[Intel-xe] [RFC PATCH 3/3] fixup! drm/xe/display: Implement display support
Jouni Högander
jouni.hogander at intel.com
Wed Sep 27 07:31:25 UTC 2023
Add i915_sw_fence.h compatibility header and implement sw fence
interfaces for display code usage.
Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
.../drm/i915/display/intel_display_types.h | 1 +
.../gpu/drm/xe/compat-i915-headers/i915_drv.h | 1 -
.../xe/compat-i915-headers/i915_sw_fence.h | 111 ++++++++++++++++++
3 files changed, 112 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_sw_fence.h
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b1141fb125c8..2d11f159f927 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -46,6 +46,7 @@
#include <drm/i915_hdcp_interface.h>
#include <media/cec-notifier.h>
+#include "i915_sw_fence.h"
#include "i915_vma.h"
#include "i915_vma_types.h"
#include "intel_bios.h"
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 03ac39efba38..c8b0f38e55fa 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -196,7 +196,6 @@ static inline void intel_runtime_pm_put(struct xe_runtime_pm *pm, bool wakeref)
#define intel_uncore_forcewake_put(x, y) do { } while (0)
#define intel_uncore_arm_unclaimed_mmio_detection(x) do { } while (0)
-#define i915_sw_fence_commit(x) do { } while (0)
#define with_intel_runtime_pm(rpm, wf) \
for ((wf) = intel_runtime_pm_get(rpm); (wf); \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_sw_fence.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_sw_fence.h
new file mode 100644
index 000000000000..fd6c96682932
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_sw_fence.h
@@ -0,0 +1,111 @@
+/*
+ * SPDX-License-Identifier: MIT
+ *
+ * i915_sw_fence.h - library routines for N:M synchronisation points
+ *
+ * Copyright (C) 2023 Intel Corporation
+ */
+
+#ifndef _I915_SW_FENCE_H_
+#define _I915_SW_FENCE_H_
+
+#include <linux/dma-fence.h>
+#include <linux/dma-resv.h>
+#include <linux/gfp.h>
+#include <linux/notifier.h> /* for NOTIFY_DONE */
+
+struct completion;
+struct dma_resv;
+struct i915_sw_fence;
+
+enum i915_sw_fence_notify {
+ FENCE_COMPLETE,
+ FENCE_FREE
+};
+
+typedef int (*i915_sw_fence_notify_t)(struct i915_sw_fence *,
+ enum i915_sw_fence_notify state);
+
+struct i915_sw_fence {
+ struct dma_resv resv;
+ i915_sw_fence_notify_t fn;
+ unsigned long timeout;
+};
+static inline void i915_sw_fence_init(struct i915_sw_fence *fence, i915_sw_fence_notify_t fn)
+{
+ dma_resv_init(&fence->resv);
+ fence->fn = fn;
+ fence->timeout = 0;
+}
+
+static inline void i915_sw_fence_fini(struct i915_sw_fence *fence)
+{
+ dma_resv_fini(&fence->resv);
+}
+
+#define i915_sw_fence_commit(x) do { } while (0)
+
+struct i915_sw_dma_fence_cb {
+ struct dma_fence_cb base;
+ struct i915_sw_fence *fence;
+};
+
+static inline int i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,
+ struct dma_fence *dma,
+ unsigned long timeout,
+ gfp_t gfp)
+{
+ int ret;
+
+ dma_resv_lock(&fence->resv, NULL);
+ ret = dma_resv_reserve_fences(&fence->resv, 1);
+ if (!ret) {
+ dma_resv_add_fence(&fence->resv, dma, dma_resv_usage_rw(false));
+ fence->timeout = max(timeout, fence->timeout);
+ }
+ dma_resv_unlock(&fence->resv);
+
+ return ret;
+}
+
+static inline int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,
+ struct dma_resv *resv,
+ bool write,
+ unsigned long timeout,
+ gfp_t gfp)
+{
+ struct dma_resv_iter cursor;
+ struct dma_fence *f;
+ int ret;
+
+ dma_resv_iter_begin(&cursor, resv, dma_resv_usage_rw(false));
+ dma_resv_for_each_fence_unlocked(&cursor, f) {
+ ret = i915_sw_fence_await_dma_fence(fence, f, timeout, gfp);
+ if (ret < 0)
+ break;
+ }
+ dma_resv_iter_end(&cursor);
+
+ return ret;
+}
+
+static inline void i915_sw_fence_wait_completion(void *unused,
+ struct i915_sw_fence *fence)
+{
+ struct dma_resv_iter cursor;
+ struct dma_fence *f;
+
+ dma_resv_wait_timeout(&fence->resv, dma_resv_usage_rw(false),
+ false, fence->timeout);
+
+ fence->fn(fence, FENCE_COMPLETE);
+
+ dma_resv_iter_begin(&cursor, &fence->resv, dma_resv_usage_rw(false));
+ dma_resv_for_each_fence_unlocked(&cursor, f)
+ dma_fence_put(f);
+ dma_resv_iter_end(&cursor);
+
+ fence->fn(fence, FENCE_FREE);
+}
+
+#endif /* _I915_SW_FENCE_H_ */
--
2.34.1
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