[Intel-xe] [PATCH v3 06/11] drm/xe/dg2: Fix using wrong PAT table

[Matt Roper]

On Wed, Sep 27, 2023 at 12:38:57PM -0700, Lucas De Marchi wrote:
> DG2 should use the MCR variant to program the PAT registers, like PVC,
> but shouldn't use the same table as PVC.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_pat.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
> index 28f401c500d8..a4bebdedbbd9 100644
> --- a/drivers/gpu/drm/xe/xe_pat.c
> +++ b/drivers/gpu/drm/xe/xe_pat.c
> @@ -108,10 +108,18 @@ void xe_pat_init_early(struct xe_device *xe)
>  		xe->pat.ops = &mtl_pat_ops;
>  		xe->pat.table = mtl_pat_table;
>  		xe->pat.n_entries = ARRAY_SIZE(mtl_pat_table);
> -	} else if (xe->info.platform == XE_PVC || xe->info.platform == XE_DG2) {
> +	} else if (xe->info.platform == XE_PVC) {
>  		xe->pat.ops = &dg2_pat_ops;
>  		xe->pat.table = pvc_pat_table;
>  		xe->pat.n_entries = ARRAY_SIZE(pvc_pat_table);
> +	} else if (xe->info.platform == XE_DG2) {
> +		/*
> +		 * Table is the same as previous platforms, but programming
> +		 * method has changed.
> +		 */
> +		xe->pat.ops = &dg2_pat_ops;
> +		xe->pat.table = tgl_pat_table;
> +		xe->pat.n_entries = ARRAY_SIZE(tgl_pat_table);
>  	} else if (GRAPHICS_VERx100(xe) <= 1210) {
>  		xe->pat.ops = &tgl_pat_ops;
>  		xe->pat.table = tgl_pat_table;
> -- 
> 2.40.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation