[Intel-xe] ✓ CI.checkpatch: success for drm/xe: Infer service copy functionality from engine list (rev3)

Patchwork patchwork at emeril.freedesktop.org
Wed Sep 27 21:18:53 UTC 2023


== Series Details ==

Series: drm/xe: Infer service copy functionality from engine list (rev3)
URL   : https://patchwork.freedesktop.org/series/124143/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 364dd1a1ed31a8e631d41cc9d084e4f69a49c882
Author: Matt Roper <matthew.d.roper at intel.com>
Date:   Wed Sep 27 13:51:44 2023 -0700

    drm/xe: Infer service copy functionality from engine list
    
    On platforms with multiple BCS engines (i.e., PVC and Xe2), not all BCS
    engines are created equal.  The BCS0 engine is what the specs refer to
    as a "resource copy engine," which supports the platform's full set of
    copy/fill instructions.  In contast, the non-BCS0 engines are more
    streamlined and only support a subset of the GPU instructions supported
    by the resource copy engine.  Platforms with both types of copy engines
    always support the MEM_COPY and MEM_SET instructions which can be used
    for simple copy and fill operations on either type of BCS engine.  Since
    the simple MEM_SET instruction meets the needs of Xe's migrate code (and
    since the more elaborate XY_FAST_COLOR_BLT instruction isn't available
    to use on service copy engines), we always prefer to use MEM_SET for
    clearing buffers on our newer platforms.
    
    We've been using a 'has_link_copy_engine' feature flag to keep track of
    which platforms should use MEM_SET for fills.  However a feature flag
    like this is unnecessary since we can already derive the presence of
    service copy engines (and in turn the MEM_SET instruction) just by
    looking at the platform's pre-fusing engine list.  Utilizing the engine
    list for this also avoids mistakes like we've made on Xe2 where we
    forget to set the feature flag in the IP definition.
    
    For clarity, "service copy" is a general term that covers any blitter
    engines that support a limited subset of the overall blitter instruction
    set (in practice this is any non-BCS0 blitter engine).  The "link copy
    engines" introduced on PVC and the "paging copy engine" present in Xe2
    are both instances of service copy engines.
    
    v2:
     - Rewrite / expand the commit message.  (Bala)
     - Fix checkpatch whitespace error.
    
    Bspec: 65019
    Cc: Lucas De Marchi <lucas.demarchi at intel.com>
    Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan at intel.com>
    Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
    Reviewed-by: Haridhar Kalvala <haridhar.kalvala at intel.com>
+ /mt/dim checkpatch bce60b0ff2937cb2ea51841a479bc1a2da65052b drm-intel
364dd1a1e drm/xe: Infer service copy functionality from engine list




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