[Intel-xe] [PATCH V5 1/2] drm/xe: Introduce low level driver error counting APIs

Niranjana Vishwanathapura niranjana.vishwanathapura at intel.com
Sat Sep 30 05:53:05 UTC 2023


On Fri, Sep 29, 2023 at 11:54:19AM +0530, Tejas Upadhyay wrote:
>Low level driver error that might have power or performance
>impact on the system, we are adding a new error counter to GT
>and tile and increment on each occurrance. Lets introduce APIs
>to define and increment each error type counter.
>
>V4:
>  - Move API declaration under tile.h - Jani
>  - Typos
>V3:
>  - correct #define max value
>V2:
>  - Move some code to its related patch - Michal
>  - Renaming if API and enum - Michal
>  - GUC errors are moved per GT - Michal
>  - Some nits - Michal
>
>Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
>---
> drivers/gpu/drm/xe/xe_device_types.h |  9 +++++++++
> drivers/gpu/drm/xe/xe_gt.c           | 18 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_gt.h           |  3 +++
> drivers/gpu/drm/xe/xe_gt_types.h     | 10 ++++++++++
> drivers/gpu/drm/xe/xe_tile.c         | 18 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_tile.h         |  2 ++
> 6 files changed, 60 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index 0717839ae964..dc57b38d7e63 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -59,6 +59,12 @@ struct xe_pat_ops;
> 		 const struct xe_tile * : (const struct xe_device *)((tile__)->xe),	\
> 		 struct xe_tile * : (tile__)->xe)
>
>+#define XE_TILE_DRV_ERR_MAX	2
>+enum xe_tile_drv_err_type {
>+	XE_TILE_DRV_ERR_GGTT,
>+	XE_TILE_DRV_ERR_INTR

We can add XE_TILE_DRV_ERR_MAX here instead of the #define above.

>+};
>+
> /**
>  * struct xe_mem_region - memory region structure
>  * This is used to describe a memory region in xe
>@@ -175,6 +181,9 @@ struct xe_tile {
>
> 	/** @sysfs: sysfs' kobj used by xe_tile_sysfs */
> 	struct kobject *sysfs;
>+
>+	/** @drv_err_cnt: driver error counter for this tile */
>+	u32 drv_err_cnt[XE_TILE_DRV_ERR_MAX];

Should these counters need to get reset to 0 upon tile/gt reset?
Should it be put under CONFIG_DRM_XE_DEBUG or define new debug
config?

> };
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>index 68cd9a7ee087..a8b5f012588b 100644
>--- a/drivers/gpu/drm/xe/xe_gt.c
>+++ b/drivers/gpu/drm/xe/xe_gt.c
>@@ -47,6 +47,24 @@
> #include "xe_wa.h"
> #include "xe_wopcm.h"
>
>+/**
>+ * xe_gt_report_driver_error - Count driver error for gt
>+ * @gt: GT to count error for
>+ * @err: enum error type
>+ *
>+ * Increment the driver error counter in respective error
>+ * category for this GT.
>+ *
>+ * Returns void.
>+ */
>+void xe_gt_report_driver_error(struct xe_gt *gt,
>+			       const enum xe_gt_drv_err_type err)
>+{
>+	xe_gt_assert(gt, err >= ARRAY_SIZE(gt->drv_err_cnt));
>+	WRITE_ONCE(gt->drv_err_cnt[err],
>+		   READ_ONCE(gt->drv_err_cnt[err]) + 1);
>+}

Same as above.

>+
> struct xe_gt *xe_gt_alloc(struct xe_tile *tile)
> {
> 	struct xe_gt *gt;
>diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
>index caded203a8a0..9442d615042f 100644
>--- a/drivers/gpu/drm/xe/xe_gt.h
>+++ b/drivers/gpu/drm/xe/xe_gt.h
>@@ -67,4 +67,7 @@ static inline bool xe_gt_is_usm_hwe(struct xe_gt *gt, struct xe_hw_engine *hwe)
> 		hwe->instance == gt->usm.reserved_bcs_instance;
> }
>
>+void xe_gt_report_driver_error(struct xe_gt *gt,
>+			       const enum xe_gt_drv_err_type err);
>+
> #endif
>diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
>index d4310be3e1e7..4645ea9b7893 100644
>--- a/drivers/gpu/drm/xe/xe_gt_types.h
>+++ b/drivers/gpu/drm/xe/xe_gt_types.h
>@@ -24,6 +24,13 @@ enum xe_gt_type {
> 	XE_GT_TYPE_MEDIA,
> };
>
>+#define XE_GT_DRV_ERR_MAX	3
>+enum xe_gt_drv_err_type {
>+	XE_GT_DRV_ERR_GUC_COMM,
>+	XE_GT_DRV_ERR_ENGINE,
>+	XE_GT_DRV_ERR_OTHERS

We can add XE_GT_DRV_ERR_MAX here instead of the #define above.

>+};
>+
> #define XE_MAX_DSS_FUSE_REGS	3
> #define XE_MAX_EU_FUSE_REGS	1
>
>@@ -347,6 +354,9 @@ struct xe_gt {
> 		/** @oob: bitmap with active OOB workaroudns */
> 		unsigned long *oob;
> 	} wa_active;
>+
>+	/** @drv_err_cnt: driver error counter for this GT */
>+	u32 drv_err_cnt[XE_GT_DRV_ERR_MAX];
> };
>
> #endif
>diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
>index 131752a57f65..708dd385f2b1 100644
>--- a/drivers/gpu/drm/xe/xe_tile.c
>+++ b/drivers/gpu/drm/xe/xe_tile.c
>@@ -71,6 +71,24 @@
>  *  - MOCS and PAT programming
>  */
>
>+/**
>+ * xe_tile_report_driver_error - Count driver error for tile
>+ * @tile: Tile to count error for
>+ * @err: enum error type
>+ *
>+ * Increment the driver error counter in respective error
>+ * category for this tile.
>+ *
>+ * Returns void.
>+ */
>+void xe_tile_report_driver_error(struct xe_tile *tile,
>+				 const enum xe_tile_drv_err_type err)
>+{
>+	xe_assert(tile_to_xe(tile), err >= ARRAY_SIZE(tile->drv_err_cnt));
>+	WRITE_ONCE(tile->drv_err_cnt[err],
>+		   READ_ONCE(tile->drv_err_cnt[err]) + 1);
>+}

Same as above.

Niranjana

>+
> /**
>  * xe_tile_alloc - Perform per-tile memory allocation
>  * @tile: Tile to perform allocations for
>diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h
>index 782c47f8bd45..092a6b17a97e 100644
>--- a/drivers/gpu/drm/xe/xe_tile.h
>+++ b/drivers/gpu/drm/xe/xe_tile.h
>@@ -14,5 +14,7 @@ int xe_tile_alloc(struct xe_tile *tile);
> int xe_tile_init_noalloc(struct xe_tile *tile);
>
> void xe_tile_migrate_wait(struct xe_tile *tile);
>+void xe_tile_report_driver_error(struct xe_tile *tile,
>+				 const enum xe_tile_drv_err_type err);
>
> #endif
>-- 
>2.25.1
>


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