[PATCH] drm/xe/xe2: Add workaround 18033852989

Ghimiray, Himal Prasad himal.prasad.ghimiray at intel.com
Mon Apr 1 16:01:50 UTC 2024



> -----Original Message-----
> From: De Marchi, Lucas <lucas.demarchi at intel.com>
> Sent: 01 April 2024 21:17
> To: Ghimiray, Himal Prasad <himal.prasad.ghimiray at intel.com>
> Cc: intel-xe at lists.freedesktop.org
> Subject: Re: [PATCH] drm/xe/xe2: Add workaround 18033852989
> 
> On Mon, Apr 01, 2024 at 10:51:42AM +0530, Himal Prasad Ghimiray wrote:
> >This workaround applies to Graphics 20.04 as RCS engine workaround.
> 
> It applies to render as this is a RCS register, but since it's part of the context
> image we classify it as an "LRC workaround", not "RCS engine workaround". The
> code below looks correct, so I'm not sure if this is leftover from previous
> version.

Thanks for pointing this out. Will upload new version with rectifying commit message. 
> 
> Aside from commit message,  Reviewed-by: Lucas De Marchi
> <lucas.demarchi at intel.com>
> 
> Lucas De Marchi
> 
> >
> >Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
> >---
> > drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
> > drivers/gpu/drm/xe/xe_wa.c           | 4 ++++
> > 2 files changed, 5 insertions(+)
> >
> >diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >index d5b21f03beaa..9728d9da9931 100644
> >--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >@@ -98,6 +98,7 @@
> > #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
> >
> > #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010)
> >+#define   DISABLE_BOTTOM_CLIP_RECTANGLE_TEST	REG_BIT(14)
> >
> > #define HIZ_CHICKEN					XE_REG(0x7018,
> XE_REG_OPTION_MASKED)
> > #define   DG1_HZ_READ_SUPPRESSION_OPTIMIZATION_DISABLE
> 	REG_BIT(14)
> >diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> >index 74b33a3845f2..c904e55ced9c 100644
> >--- a/drivers/gpu/drm/xe/xe_wa.c
> >+++ b/drivers/gpu/drm/xe/xe_wa.c
> >@@ -579,6 +579,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
> > 		       ENGINE_CLASS(RENDER)),
> > 	  XE_RTP_ACTIONS(SET(INSTPM(RENDER_RING_BASE),
> ENABLE_SEMAPHORE_POLL_BIT))
> > 	},
> >+	{ XE_RTP_NAME("18033852989"),
> >+	  XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
> >+	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1,
> DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
> >+	},
> >
> > 	{}
> > };
> >--
> >2.25.1
> >


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