✓ CI.checkpatch: success for drm/xe/xe2: Add workaround 18033852989 (rev3)

[Patchwork]

== Series Details ==

Series: drm/xe/xe2: Add workaround 18033852989 (rev3)
URL   : https://patchwork.freedesktop.org/series/131881/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
10b531c2aeb176a1a539b4a77216232f97719cec
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 20ff2e42d3a3da38e8b712fe507a6e879e9dd9bf
Author: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
Date:   Mon Apr 1 22:08:06 2024 +0530

    drm/xe/xe2: Add workaround 18033852989
    
    This workaround applies to RCS engine's context, hence added as
    LRC workaround.
    
    v2
    - Fix commit description as lrc workaround instead of engine.(Lucas)
    
    v3
    - COMMON_SLICE_CHICKEN1 is a masked register, add XE_REG_OPTION_MASKED
    flag. (Matt)
    
    BSPEC: 55899
    
    Cc: Matt Roper <matthew.d.roper at intel.com>
    Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
    Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
    Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
+ /mt/dim checkpatch a585b19932157f2c96293bf00288968ada86d435 drm-intel
20ff2e42d3a3 drm/xe/xe2: Add workaround 18033852989