[PATCH v2 14/25] drm/i915/xe2hpd: Add missing chicken bit register programming

[Matt Roper]

On Wed, Apr 03, 2024 at 04:52:42PM +0530, Balasubramani Vivekanandan wrote:
> From: Anusha Srivatsa <anusha.srivatsa at intel.com>
> 
> Add step 9 from initialize display sequence.
> 
> Bpsec: 49189
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan at intel.com>

I think the title here is misleading since "missing" makes it sound like
we overlooked something previously, whereas in reality this is just a
new required step on Xe2_HPD.  A title like "Configure CHICKEN_MISC_2
before enabling planes" would probably be more accurate.

With updated wording,

        Reviewed-by: Matt Roper <matthew.d.roper at intel.com>


Matt

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h                    | 1 +
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 6fd4fa52253a..bf9685acf75a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1694,6 +1694,10 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
>  	if (IS_DG2(dev_priv))
>  		intel_snps_phy_wait_for_calibration(dev_priv);
>  
> +	/* 9. XE2_HPD: Program CHICKEN_MISC_2 before any cursor or planes are enabled */
> +	if (DISPLAY_VER_FULL(dev_priv) == IP_VER(14, 1))
> +		intel_de_rmw(dev_priv, CHICKEN_MISC_2, BMG_DARB_HALF_BLK_END_BURST, 1);
> +
>  	if (resume)
>  		intel_dmc_load_program(dev_priv);
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 58f3e4bfe254..875d76fb8cd0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4548,6 +4548,7 @@
>  
>  #define CHICKEN_MISC_2		_MMIO(0x42084)
>  #define   CHICKEN_MISC_DISABLE_DPT	REG_BIT(30) /* adl,dg2 */
> +#define   BMG_DARB_HALF_BLK_END_BURST	REG_BIT(27)
>  #define   KBL_ARB_FILL_SPARE_14		REG_BIT(14)
>  #define   KBL_ARB_FILL_SPARE_13		REG_BIT(13)
>  #define   GLK_CL2_PWR_DOWN		REG_BIT(12)
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation