[PATCH v4 2/2] drm/xe/lnl: Enable GuC Wa_14019882105
John Harrison
john.c.harrison at intel.com
Mon Apr 8 20:56:27 UTC 2024
On 4/5/2024 01:42, Badal Nilawar wrote:
> Enable GuC Wa_14019882105 to block interrupts during C6 flow
> when the memory path has been blocked
>
> v2: Make helper function generic and name it as
> guc_waklv_enable_simple (John Harrison)
> v3: Make warning descriptive (John Harrison)
> v4: s/drm_WARN/xe_gt_WARN/ (Michal)
>
> Cc: John Harrison <john.harrison at intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar at intel.com>
Reviewed-by: John Harrison <John.C.Harrison at Intel.com>
> ---
> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 7 +++++
> drivers/gpu/drm/xe/xe_guc_ads.c | 38 ++++++++++++++++++++++-----
> drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
> 3 files changed, 39 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> index 0400bc0fccdc..5dd45e06f0b6 100644
> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> @@ -319,4 +319,11 @@ enum {
> #define GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID_KEY 0x8a0b
> #define GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID_LEN 1u
>
> +/*
> + * Workaround keys:
> + */
> +enum xe_guc_klv_ids {
> + GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED = 0x9002,
> +};
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index 0a8f27243c84..757cbbb87869 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -7,6 +7,8 @@
>
> #include <drm/drm_managed.h>
>
> +#include <generated/xe_wa_oob.h>
> +
> #include "regs/xe_engine_regs.h"
> #include "regs/xe_gt_regs.h"
> #include "regs/xe_guc_regs.h"
> @@ -19,6 +21,7 @@
> #include "xe_map.h"
> #include "xe_mmio.h"
> #include "xe_platform_types.h"
> +#include "xe_wa.h"
>
> /* Slack of a few additional entries per engine */
> #define ADS_REGSET_EXTRA_MAX 8
> @@ -279,21 +282,42 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
> return total_size;
> }
>
> +static void guc_waklv_enable_simple(struct xe_guc_ads *ads,
> + enum xe_guc_klv_ids klv_id, u32 *offset, u32 *remain)
> +{
> + u32 klv_entry[] = {
> + /* 16:16 key/length */
> + FIELD_PREP(GUC_KLV_0_KEY, klv_id) |
> + FIELD_PREP(GUC_KLV_0_LEN, 0),
> + /* 0 dwords data */
> + };
> + u32 size;
> +
> + size = sizeof(klv_entry);
> +
> + if (xe_gt_WARN(ads_to_gt(ads), *remain < size,
> + "w/a klv buffer too small to add klv id %d\n", klv_id))
> + return;
> +
> + xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), *offset,
> + klv_entry, size);
> + *offset += size;
> + *remain -= size;
> +}
> +
> static void guc_waklv_init(struct xe_guc_ads *ads)
> {
> + struct xe_gt *gt = ads_to_gt(ads);
> u64 addr_ggtt;
> u32 offset, remain, size;
>
> offset = guc_ads_waklv_offset(ads);
> remain = guc_ads_waklv_size(ads);
>
> - /* Add workarounds here
> - *
> - * if (XE_WA(gt, wa_id))
> - * guc_waklv_enable_simple(ads,
> - * wa_klv_id,
> - * &offset, &remain);
> - */
> + if (XE_WA(gt, 14019882105))
> + guc_waklv_enable_simple(ads,
> + GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED,
> + &offset, &remain);
>
> size = guc_ads_waklv_size(ads) - remain;
> if (!size)
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 68600cdead84..98a81468bc8e 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -20,3 +20,4 @@
> MEDIA_VERSION(1300)
> PLATFORM(DG2)
> 14018094691 GRAPHICS_VERSION(2004)
> +14019882105 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
More information about the Intel-xe
mailing list