✗ CI.checkpatch: warning for L3 bank mask (rev2)

[Patchwork]

== Series Details ==

Series: L3 bank mask (rev2)
URL   : https://patchwork.freedesktop.org/series/132075/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
10b531c2aeb176a1a539b4a77216232f97719cec
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 27564f271ee8b9750355e09d748e1fef6b787b89
Author: Francois Dugast <francois.dugast at intel.com>
Date:   Wed Apr 10 12:37:23 2024 +0000

    drm/xe/uapi: Expose the L3 bank mask
    
    Extend the topology query to include the mask of enabled L3 banks on
    the GT. This information is needed for user space components which
    provide metrics depending on the exact hardware configuration. In this
    case, the L3 bank count is not sufficient as on some platforms not
    all L3 banks might be enabled, hence the mask exposed by this query.
    
    Cc: Matt Roper <matthew.d.roper at intel.com>
    Cc: Robert Krzemien <robert.krzemien at intel.com>
    Signed-off-by: Francois Dugast <francois.dugast at intel.com>
+ /mt/dim checkpatch bf24d40fae19bcceac3e32c4866079b4f10c70f9 drm-intel
a07fd11b841a drm/xe/gt: Add L3 bank mask to GT topology
-:199: WARNING:NEW_TYPEDEFS: do not add new typedefs
#199: FILE: drivers/gpu/drm/xe/xe_gt_types.h:35:
+typedef unsigned long xe_l3_bank_mask_t[BITS_TO_LONGS(XE_MAX_L3_BANK_MASK_BITS)];

total: 0 errors, 1 warnings, 0 checks, 174 lines checked
27564f271ee8 drm/xe/uapi: Expose the L3 bank mask