[PATCH] drm/xe/lnl: Apply GuC Wa_13011645652

John Harrison john.c.harrison at intel.com
Fri Apr 12 20:12:02 UTC 2024


On 4/11/2024 16:32, Vinay Belgaumkar wrote:
> Enable WA for a bug that could cause the C6 state machine to hang
> during RC6 exit.
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
> ---
>   drivers/gpu/drm/xe/abi/guc_klvs_abi.h |  1 +
>   drivers/gpu/drm/xe/xe_guc_ads.c       | 33 +++++++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_wa_oob.rules    |  1 +
>   3 files changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> index 5dd45e06f0b6..3158fddb2f27 100644
> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> @@ -324,6 +324,7 @@ enum  {
>    */
>   enum xe_guc_klv_ids {
>   	GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED				= 0x9002,
> +	GUC_WA_KLV_NP_RD_WRITE_TO_CLEAR_RCSM_AT_CGP_LATE_RESTORE			= 0x9008,
>   };
>   
>   #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index 757cbbb87869..05b6e7fa7fc2 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -282,6 +282,33 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
>   	return total_size;
>   }
>   
> +static void guc_waklv_enable_one_word(struct xe_guc_ads *ads,
> +				      enum xe_guc_klv_ids klv_id,
> +				      u32 value,
> +				      u32 *offset, u32 *remain)
> +{
> +	u32 size;
> +	u32 klv_entry[] = {
> +		/* 16:16 key/length */
> +		FIELD_PREP(GUC_KLV_0_KEY, klv_id) |
> +		FIELD_PREP(GUC_KLV_0_LEN, 1),
> +		value,
> +		/* 1 dword data */
> +	};
> +
> +	size = sizeof(klv_entry);
> +
> +	if (*remain < size) {
> +		drm_warn(&ads_to_xe(ads)->drm,
> +			 "w/a klv buffer too small to add klv id %d\n", klv_id);
> +	} else {
> +		xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), *offset,
> +				 klv_entry, size);
> +		*offset += size;
> +		*remain -= size;
> +	}
> +}
> +
>   static void guc_waklv_enable_simple(struct xe_guc_ads *ads,
>   				    enum xe_guc_klv_ids klv_id, u32 *offset, u32 *remain)
>   {
> @@ -319,6 +346,12 @@ static void guc_waklv_init(struct xe_guc_ads *ads)
>   					GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED,
>   					&offset, &remain);
>   
> +	if (XE_WA(gt, 13011645652))
> +		guc_waklv_enable_one_word(ads,
> +					  GUC_WA_KLV_NP_RD_WRITE_TO_CLEAR_RCSM_AT_CGP_LATE_RESTORE,
> +					  0xC40,
It is probably worth explaining where this value comes from. Something like:
     The workaround involves re-writing the value of register XXXX to a 
known correct value. Currently this is just the power on default of 0xC40.

John.

> +					  &offset, &remain);
> +
>   	size = guc_ads_waklv_size(ads) - remain;
>   	if (!size)
>   		return;
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 98a81468bc8e..f74af0d369dd 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -21,3 +21,4 @@
>   		PLATFORM(DG2)
>   14018094691	GRAPHICS_VERSION(2004)
>   14019882105	GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +13011645652	GRAPHICS_VERSION(2004)



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