✓ CI.checkpatch: success for L3 bank mask (rev3)

[Patchwork]

== Series Details ==

Series: L3 bank mask (rev3)
URL   : https://patchwork.freedesktop.org/series/132075/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fae1e565f2e5fbb878df0dbfb24f3f7fc481a38f
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 048c3825db7c3a6de6695f8aabcf044a8ad077ad
Author: Francois Dugast <francois.dugast at intel.com>
Date:   Tue Apr 16 14:50:37 2024 +0000

    drm/xe/uapi: Expose the L3 bank mask
    
    The L3 bank mask is already generated and stored internally with
    the rest of the GT topology. In user space, the compute runtime
    now needs this information to be added to the device properties
    therefore the topology mask query is extended to provide a new
    mask which represents the L3 banks enabled on the GT.
    
    The changes in the compute runtime are ready and approved, see
    link below.
    
    v2: Rewrite commit message and add a link to the compute
        runtime PR (Francois Dugast)
    
    Cc: Matt Roper <matthew.d.roper at intel.com>
    Cc: Robert Krzemien <robert.krzemien at intel.com>
    Cc: Mateusz Jablonski <mateusz.jablonski at intel.com>
    Link: https://github.com/intel/compute-runtime/pull/722
    Signed-off-by: Francois Dugast <francois.dugast at intel.com>
+ /mt/dim checkpatch a761439bd7de146bbb362b8c614a2863bf6d8d76 drm-intel
048c3825db7c drm/xe/uapi: Expose the L3 bank mask