[PATCH v2 1/3] drm/xe/gsc: define GSCCS for LNL

[Chauhan, Shekhar]

On 4/17/2024 03:51, Daniele Ceraolo Spurio wrote:
> LNL has 1 GSCCS, same as MTL. Note that the GSCCS will be disabled until
> we have a GSC FW defined, but having it in the list of engine is a
> requirement to add such definition.
Reviewed-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_pci.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 3b30353dbc09..ad46ed6a2de7 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -209,7 +209,8 @@ static const struct xe_media_desc media_xelpmp = {
>   static const struct xe_media_desc media_xe2 = {
>   	.name = "Xe2_LPM / Xe2_HPM",
>   	.hw_engine_mask =
> -		BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0), /* TODO: GSC0 */
> +		BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0) |
> +		BIT(XE_HW_ENGINE_GSCCS0)
>   };
>   
>   static const struct xe_device_desc tgl_desc = {

-- 
-shekhar