✓ CI.checkpatch: success for drm/xe: Define all possible engines in media IP descriptors

[Patchwork]

== Series Details ==

Series: drm/xe: Define all possible engines in media IP descriptors
URL   : https://patchwork.freedesktop.org/series/132568/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
f5fb02e01091a469b6325b72a47b3a0a1e96309c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8fcb91b4e5ef6a45f8a3f0a7d41572e8e9573687
Author: Matt Roper <matthew.d.roper at intel.com>
Date:   Wed Apr 17 08:26:22 2024 -0700

    drm/xe: Define all possible engines in media IP descriptors
    
    Rather than trying to identify exactly which engines are available on
    each platform in the IP descriptor, just include the list of all media
    engines that the IP could theoretically support (i.e., 8 VCS + 4 VECS).
    We still rely on the media fuse registers to tell us which specific
    engine instances are actually present on a given platform, so there
    shouldn't be any functional change.  This will help prevent mistakes
    with engine numbering (for example ambiguity about whether the 2nd VCS
    engine on a platform with exactly two engines is numbered "VCS1" or
    "VCS2") and will also future-proof the code a bit more in case new SKUs
    or platform refreshes extend the engine list in the future.
    
    Note that the media fuse register technically has an 8-bit field for
    VECS engine presence starting on Xe2.  However there's still no MMIO
    register range reserved for VE engines above VECS3, so VE0-VE3 is still
    consider the "maximum" VE engine mask that the driver can support for
    now.
    
    Bspec: 52614, 52615, 62567
    Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
+ /mt/dim checkpatch d9ed10db0dab988accaf881038e3e371f12ed5d5 drm-intel
8fcb91b4e5ef drm/xe: Define all possible engines in media IP descriptors