[PATCH] drm/xe/xe2lpg: Extend Wa_14020338487

Gustavo Sousa gustavo.sousa at intel.com
Wed Apr 17 21:45:47 UTC 2024


Quoting Gustavo Sousa (2024-04-17 18:25:01-03:00)
>Wa_14020338487 also applies to Xe2_LPG. Replicate the existing entry to
>one specific for Xe2_LPG.

I would also like to take this as an opportunity to discuss the way we
are currently arranging the RTP entries for the workaround. Using this
one as example, created a copy of the entry and edited the argument of
GRAPHICS_VERSION() to match Xe2_LPG. There are multiple cases already
following the same pattern, mainly because we are grouping entries by
IP release.

Do we want to continue following that pattern and keep the code
duplication? Or should we think of a way to avoid code duplication here?

A very simple approach that I think of is having a single entry for each
lineage. But I guess that's not really feasible today because I guess we
do not have a way of expressing logical disjunction in XE_RTP_RULES().

--
Gustavo Sousa

>
>Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
>---
> drivers/gpu/drm/xe/xe_wa.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
>index 632bd9066f8d..dcf7ed51757c 100644
>--- a/drivers/gpu/drm/xe/xe_wa.c
>+++ b/drivers/gpu/drm/xe/xe_wa.c
>@@ -445,6 +445,10 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>                        FUNC(xe_rtp_match_first_render_or_compute)),
>           XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN5, DISABLE_SAMPLE_G_PERFORMANCE))
>         },
>+        { XE_RTP_NAME("14020338487"),
>+          XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
>+          XE_RTP_ACTIONS(SET(ROW_CHICKEN3, XE2_EUPEND_CHK_FLUSH_DIS))
>+        },
>         { XE_RTP_NAME("16021540221"),
>           XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
>                        FUNC(xe_rtp_match_first_render_or_compute)),
>-- 
>2.44.0
>


More information about the Intel-xe mailing list