✓ CI.checkpatch: success for series starting with [1/2] drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
URL   : https://patchwork.freedesktop.org/series/132581/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
f5fb02e01091a469b6325b72a47b3a0a1e96309c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cfe7a7e17a661bbf16976e925f5a8f3ee624a61a
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date:   Wed Apr 17 14:12:24 2024 -0700

    drm/xe/gsc: define GSCCS for LNL
    
    LNL has 1 GSCCS, same as MTL. Note that the GSCCS will be disabled until
    we have a GSC FW defined, but having it in the list of engine is a
    requirement to add such definition.
    
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
    Reviewed-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
    Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
+ /mt/dim checkpatch 64a20aacb61e4ce6d8a0b3dc6e4bff72e316ffa3 drm-intel
3425da7fa4dd drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
cfe7a7e17a66 drm/xe/gsc: define GSCCS for LNL