✓ CI.checkpatch: success for series starting with [CI,1/2] drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
Patchwork
patchwork at emeril.freedesktop.org
Sat Apr 20 03:23:26 UTC 2024
== Series Details ==
Series: series starting with [CI,1/2] drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
URL : https://patchwork.freedesktop.org/series/132658/
State : success
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
0daf0be5bb95eb0a0e42275e00a0e42d8d8fd543
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 58a1c2e874bba7b035e9b60f14910b24823c524d
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date: Fri Apr 19 11:34:12 2024 -0700
drm/xe/gsc: define GSCCS for LNL
LNL has 1 GSCCS, same as MTL. Note that the GSCCS will be disabled until
we have a GSC FW defined, but having it in the list of engine is a
requirement to add such definition.
v2: rebase
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Reviewed-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
+ /mt/dim checkpatch 5b8f5c906246fb3ddf35b775a3b6ac9ea5fdcdd5 drm-intel
72182d6e1d03 drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
58a1c2e874bb drm/xe/gsc: define GSCCS for LNL
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