[PATCH] drm/xe: add wopcm region size to the device info
Farah Kassabri
fkassabri at habana.ai
Wed Apr 24 10:48:02 UTC 2024
As each product may have different wopcm region size,
it's better to have this information as part of the device
descriptor, that way we won't need to keep adding more
else cases to the function which retrieve that size for
future products.
Signed-off-by: Farah Kassabri <fkassabri at habana.ai>
---
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
drivers/gpu/drm/xe/xe_ggtt.c | 3 +--
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 4 ++--
drivers/gpu/drm/xe/xe_guc.c | 3 +--
drivers/gpu/drm/xe/xe_pci.c | 12 +++++++++++-
drivers/gpu/drm/xe/xe_wopcm.c | 17 +----------------
drivers/gpu/drm/xe/xe_wopcm.h | 1 -
7 files changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 2e62450d86e1..fa3c7ca2f2d4 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -230,6 +230,8 @@ struct xe_device {
u32 media_verx100;
/** @info.mem_region_mask: mask of valid memory regions */
u32 mem_region_mask;
+ /** @info.wopcm_size: wopcm region size */
+ u32 wopcm_size;
/** @info.platform: XE platform enum */
enum xe_platform platform;
/** @info.subplatform: XE subplatform enum */
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 0d541f55b4fc..b4e089c3333d 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -188,8 +188,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
else
ggtt->pt_ops = &xelp_pt_ops;
- drm_mm_init(&ggtt->mm, xe_wopcm_size(xe),
- ggtt->size - xe_wopcm_size(xe));
+ drm_mm_init(&ggtt->mm, xe->info.wopcm_size, ggtt->size - xe->info.wopcm_size);
mutex_init(&ggtt->lock);
primelockdep(ggtt);
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index 79116ad58620..18b7aa8d1f94 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -575,7 +575,7 @@ static u64 pf_get_max_ggtt(struct xe_gt *gt)
const struct drm_mm_node *entry;
u64 alignment = pf_get_ggtt_alignment(gt);
u64 spare = pf_get_spare_ggtt(gt);
- u64 hole_min_start = xe_wopcm_size(gt_to_xe(gt));
+ u64 hole_min_start = gt_to_xe(gt)->info.wopcm_size;
u64 hole_start, hole_end, hole_size;
u64 max_hole = 0;
@@ -1932,7 +1932,7 @@ int xe_gt_sriov_pf_config_print_available_ggtt(struct xe_gt *gt, struct drm_prin
const struct drm_mm *mm = &ggtt->mm;
const struct drm_mm_node *entry;
u64 alignment = pf_get_ggtt_alignment(gt);
- u64 hole_min_start = xe_wopcm_size(gt_to_xe(gt));
+ u64 hole_min_start = gt_to_xe(gt)->info.wopcm_size;
u64 hole_start, hole_end, hole_size;
u64 spare, avail, total = 0;
char buf[10];
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 240e7a4bbff1..48468c0bcf7c 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -41,8 +41,7 @@ static u32 guc_bo_ggtt_addr(struct xe_guc *guc,
struct xe_device *xe = guc_to_xe(guc);
u32 addr = xe_bo_ggtt_addr(bo);
- /* GuC addresses above GUC_GGTT_TOP don't map through the GTT */
- xe_assert(xe, addr >= xe_wopcm_size(guc_to_xe(guc)));
+ xe_assert(xe, addr >= xe->info.wopcm_size);
xe_assert(xe, addr < GUC_GGTT_TOP);
xe_assert(xe, bo->size <= GUC_GGTT_TOP - addr);
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a0cf5dd803c2..55f977124647 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -57,6 +57,8 @@ struct xe_device_desc {
enum xe_platform platform;
+ u32 wopcm_size;
+
u8 require_force_probe:1;
u8 is_dgfx:1;
@@ -221,6 +223,7 @@ static const struct xe_device_desc tgl_desc = {
.has_display = true,
.has_llc = true,
.require_force_probe = true,
+ .wopcm_size = SZ_2M,
};
static const struct xe_device_desc rkl_desc = {
@@ -282,6 +285,7 @@ static const struct xe_device_desc dg1_desc = {
.has_display = true,
.has_heci_gscfi = 1,
.require_force_probe = true,
+ .wopcm_size = SZ_4M,
};
static const u16 dg2_g10_ids[] = { XE_DG2_G10_IDS(NOP), XE_ATS_M150_IDS(NOP), 0 };
@@ -306,6 +310,7 @@ static const struct xe_device_desc ats_m_desc = {
DG2_FEATURES,
.has_display = false,
+ .wopcm_size = SZ_2M,
};
static const struct xe_device_desc dg2_desc = {
@@ -315,6 +320,7 @@ static const struct xe_device_desc dg2_desc = {
DG2_FEATURES,
.has_display = true,
+ .wopcm_size = SZ_2M,
};
static const struct xe_device_desc pvc_desc = {
@@ -324,6 +330,7 @@ static const struct xe_device_desc pvc_desc = {
.has_display = false,
.has_heci_gscfi = 1,
.require_force_probe = true,
+ .wopcm_size = SZ_4M,
};
static const struct xe_device_desc mtl_desc = {
@@ -331,18 +338,21 @@ static const struct xe_device_desc mtl_desc = {
.require_force_probe = true,
PLATFORM(XE_METEORLAKE),
.has_display = true,
+ .wopcm_size = SZ_4M,
};
static const struct xe_device_desc lnl_desc = {
PLATFORM(XE_LUNARLAKE),
.has_display = true,
.require_force_probe = true,
+ .wopcm_size = SZ_2M,
};
static const struct xe_device_desc bmg_desc __maybe_unused = {
DGFX_FEATURES,
PLATFORM(XE_BATTLEMAGE),
.require_force_probe = true,
+ .wopcm_size = SZ_4M,
};
#undef PLATFORM
@@ -567,7 +577,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.skip_guc_pc = desc->skip_guc_pc;
xe->info.skip_mtcfg = desc->skip_mtcfg;
xe->info.skip_pcode = desc->skip_pcode;
-
+ xe->info.wopcm_size = desc->wopcm_size;
xe->info.enable_display = IS_ENABLED(CONFIG_DRM_XE_DISPLAY) &&
xe_modparam.enable_display &&
desc->has_display;
diff --git a/drivers/gpu/drm/xe/xe_wopcm.c b/drivers/gpu/drm/xe/xe_wopcm.c
index d3a99157e523..0b5a11dbd770 100644
--- a/drivers/gpu/drm/xe/xe_wopcm.c
+++ b/drivers/gpu/drm/xe/xe_wopcm.c
@@ -45,14 +45,6 @@
* The top part of the WOPCM is reserved for hardware contexts (e.g. RC6
* context).
*/
-
-/* Default WOPCM size is 2MB from Gen11, 1MB on previous platforms */
-/* FIXME: Larger size require for 2 tile PVC, do a proper probe sooner or later */
-#define DGFX_WOPCM_SIZE SZ_4M
-/* FIXME: Larger size require for MTL, do a proper probe sooner or later */
-#define MTL_WOPCM_SIZE SZ_4M
-#define WOPCM_SIZE SZ_2M
-
#define MAX_WOPCM_SIZE SZ_8M
/* 16KB WOPCM (RSVD WOPCM) is reserved from HuC firmware top. */
@@ -177,13 +169,6 @@ static int __wopcm_init_regs(struct xe_device *xe, struct xe_gt *gt,
return err;
}
-u32 xe_wopcm_size(struct xe_device *xe)
-{
- return IS_DGFX(xe) ? DGFX_WOPCM_SIZE :
- xe->info.platform == XE_METEORLAKE ? MTL_WOPCM_SIZE :
- WOPCM_SIZE;
-}
-
/**
* xe_wopcm_init() - Initialize the WOPCM structure.
* @wopcm: pointer to xe_wopcm.
@@ -209,7 +194,7 @@ int xe_wopcm_init(struct xe_wopcm *wopcm)
if (!guc_fw_size)
return -EINVAL;
- wopcm->size = xe_wopcm_size(xe);
+ wopcm->size = xe->info.wopcm_size;
drm_dbg(&xe->drm, "WOPCM: %uK\n", wopcm->size / SZ_1K);
xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
diff --git a/drivers/gpu/drm/xe/xe_wopcm.h b/drivers/gpu/drm/xe/xe_wopcm.h
index 0197a282460b..37a38d10f897 100644
--- a/drivers/gpu/drm/xe/xe_wopcm.h
+++ b/drivers/gpu/drm/xe/xe_wopcm.h
@@ -11,6 +11,5 @@
struct xe_device;
int xe_wopcm_init(struct xe_wopcm *wopcm);
-u32 xe_wopcm_size(struct xe_device *xe);
#endif
--
2.34.1
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