✓ CI.checkpatch: success for series starting with [CI,1/2] drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine (rev2)

Patchwork patchwork at emeril.freedesktop.org
Tue Apr 30 16:45:07 UTC 2024


== Series Details ==

Series: series starting with [CI,1/2] drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine (rev2)
URL   : https://patchwork.freedesktop.org/series/132658/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
0daf0be5bb95eb0a0e42275e00a0e42d8d8fd543
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6f5a407e25c8657ce780f638a4011522339de88c
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date:   Fri Apr 19 11:34:12 2024 -0700

    drm/xe/gsc: define GSCCS for LNL
    
    LNL has 1 GSCCS, same as MTL. Note that the GSCCS will be disabled until
    we have a GSC FW defined, but having it in the list of engine is a
    requirement to add such definition.
    
    v2: rebase
    
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
    Reviewed-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
    Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
+ /mt/dim checkpatch 016b4f46551e7a9b3da9607e546b18df2ca31cbc drm-intel
dc03381086d4 drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
6f5a407e25c8 drm/xe/gsc: define GSCCS for LNL




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