[PATCH v2] drm/xe/xe_gt_idle: add debugfs entry for powergating info

[Michal Wajdeczko]

On 29.07.2024 12:29, Riana Tauro wrote:
> Coarse Powergating is a power saving technique where Render and Media
> can be power-gated independently irrespective of the rest of the GT.
> 
> For debug purposes, it is useful to expose the powergating information.
> 
> v2: move to debugfs
>     add details to commit message
>     add per-slice status for media
>     define reg bits in descending order (Matt Roper)
> 
> v3: fix return statement
>     fix kernel-doc
>     use loop for media slices
>     use helper function for status (Michal)
> 
> Signed-off-by: Riana Tauro <riana.tauro at intel.com>
> ---

...

> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
> @@ -53,6 +53,11 @@ pc_to_xe(struct xe_guc_pc *pc)
>  	return gt_to_xe(gt);
>  }
>  
> +static inline const char *str_up_down(bool v)
> +{
> +	return v ? "up" : "down";
> +}
> +

+ @Rodrigo

this helper was pushed to for-next/hardening branch [1], we might want
to cherry-pick it now instead of defining a local copy in our tree to
avoid build breaks later

[1]
https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git/commit/?h=for-next/hardening&id=3ff37dbb1ae9926d3b51749f7d0d3f474fe2440b