[PATCH] drm/xe/hwmon: Fix xe_hwmon_pcode_write_i1 param from u32 to u16

[Poosa, Karthik]

Ignore this revision of patch. Raised this to get igt results.

On 08-08-2024 22:57, Karthik Poosa wrote:
> WRITE_I1 sub command of pcode takes param of u16 compared to u32 for
> READ_I1, so corrected it. Without this pcode shall return illegal
> sub command errors.
>
> Signed-off-by: Karthik Poosa <karthik.poosa at intel.com>
> Fixes: 92d44a422d0d ("drm/xe/hwmon: Expose card reactive critical power")
> ---
>   drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 832ea81faeee..617c8bdb8f28 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -446,11 +446,11 @@ static int xe_hwmon_pcode_read_i1(struct xe_gt *gt, u32 *uval)
>   			     uval, NULL);
>   }
>   
> -static int xe_hwmon_pcode_write_i1(struct xe_gt *gt, u32 uval)
> +static int xe_hwmon_pcode_write_i1(struct xe_gt *gt, u16 uval)
>   {
>   	return xe_pcode_write(gt, PCODE_MBOX(PCODE_POWER_SETUP,
>   			      POWER_SETUP_SUBCOMMAND_WRITE_I1, 0),
> -			      uval);
> +			      (u32)(uval & POWER_SETUP_I1_DATA_MASK));
>   }
>   
>   static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
> @@ -476,11 +476,11 @@ static int xe_hwmon_power_curr_crit_write(struct xe_hwmon *hwmon, int channel,
>   					  long value, u32 scale_factor)
>   {
>   	int ret;
> -	u32 uval;
> +	u16 uval;
>   
>   	mutex_lock(&hwmon->hwmon_lock);
>   
> -	uval = DIV_ROUND_CLOSEST_ULL(value << POWER_SETUP_I1_SHIFT, scale_factor);
> +	uval = DIV_ROUND_CLOSEST((u16)value << POWER_SETUP_I1_SHIFT, scale_factor);
>   	ret = xe_hwmon_pcode_write_i1(hwmon->gt, uval);
>   
>   	mutex_unlock(&hwmon->hwmon_lock);