[RFC PATCH 6/8] drm/xe: Add ULLS migration job support to ring ops
Matthew Brost
matthew.brost at intel.com
Mon Aug 12 02:47:15 UTC 2024
Add preamble and postamble for ULLS migrations jobs. Premable clears
current semaphore for reuse. Postamble waits on next semaphore which is
set upon next job submission. The last ULLS migration job skips BB
submission and postamble (clear current semaphore, write seqno, exit
ULLS).
Signed-off-by: Matthew Brost <matthew.brost at intel.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 0be4f489d3e1..67e4439177f1 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -389,10 +389,38 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
xe_lrc_write_ring(lrc, dw, i * sizeof(*dw));
}
+static int emit_ulls_preamble(struct xe_lrc *lrc, u32 *dw, int i, u32 seqno)
+{
+ u32 addr = xe_lrc_ulls_semaphore_ggtt_addr(lrc, seqno);
+
+ return emit_store_imm_ggtt(addr, 0, dw, i);
+}
+
+static int emit_ulls_postamble(struct xe_lrc *lrc, u32 *dw, int i, u32 seqno)
+{
+ dw[i++] = MI_SEMAPHORE_WAIT |
+ MI_SEMAPHORE_GLOBAL_GTT |
+ MI_SEMAPHORE_POLL |
+ MI_SEMAPHORE_SAD_EQ_SDD;
+ dw[i++] = 1;
+ dw[i++] = xe_lrc_ulls_semaphore_ggtt_addr(lrc, seqno + 1);
+ dw[i++] = 0;
+
+ return i;
+}
+
static void emit_migration_job_gen12(struct xe_sched_job *job,
struct xe_lrc *lrc, u32 seqno)
{
u32 dw[MAX_JOB_SIZE_DW], i = 0;
+ bool ulls = test_bit(JOB_FLAG_ULLS, &job->fence->flags);
+ bool ulls_last = test_bit(JOB_FLAG_ULLS_LAST, &job->fence->flags);
+
+ if (ulls) {
+ i = emit_ulls_preamble(lrc, dw, i, seqno);
+ if (ulls_last)
+ goto seqno_write;
+ }
i = emit_copy_timestamp(lrc, dw, i);
@@ -412,6 +440,7 @@ static void emit_migration_job_gen12(struct xe_sched_job *job,
i = emit_bb_start(job->ptrs[1].batch_addr, BIT(8), dw, i);
+seqno_write:
dw[i++] = MI_FLUSH_DW | MI_INVALIDATE_TLB | job->migrate_flush_flags |
MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_IMM_DW;
dw[i++] = xe_lrc_seqno_ggtt_addr(lrc) | MI_FLUSH_DW_USE_GTT;
@@ -420,6 +449,9 @@ static void emit_migration_job_gen12(struct xe_sched_job *job,
i = emit_user_interrupt(dw, i);
+ if (ulls && !ulls_last)
+ i = emit_ulls_postamble(lrc, dw, i, seqno);
+
xe_gt_assert(job->q->gt, i <= MAX_JOB_SIZE_DW);
xe_lrc_write_ring(lrc, dw, i * sizeof(*dw));
--
2.34.1
More information about the Intel-xe
mailing list