[PATCH 2/2] drm/xe/uapi: Expose wmtp as engine capability

[Jablonski, Mateusz]

Add capabilities to engine struct which can be used to expose various capabilities of each engine.

Add wmtp as engine capability which is retrieve from GT info.

Take a field from the reserved for that purpose.

v2: Use 32 bit for capabilities(Lucas).
    Only Expose Compute engine till there is user-case
    for Render engine(Joonas).
    Don't use BIT() for uAPI (Francois)

Cc: Francois Dugast <francois.dugast at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Cc: Lucas De Marchi <lucas.demarchi at intel.com>
Cc: Mateusz Jablonski <mateusz.jablonski at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
---
 drivers/gpu/drm/xe/xe_query.c |  4 ++++
 include/uapi/drm/xe_drm.h     | 12 ++++++++++--
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c index 73ef6e4c2dc9..005f4f2da3d9 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -213,6 +213,10 @@ static int query_engines(struct xe_device *xe,
 			engines->engines[i].instance.engine_instance =
 				hwe->logical_instance;
 			engines->engines[i].instance.gt_id = gt->info.id;
+			if (gt->info.has_wmtp &&
+			    hwe->class == XE_ENGINE_CLASS_COMPUTE)
+				engines->engines[i].capabilities |=
+					DRM_XE_ENGINE_CAPABILITY_WMTP;
 
 			i++;
 		}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index b6fbe4988f2e..975666b6fe28 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -247,13 +247,21 @@ struct drm_xe_engine_class_instance {
 
 /**
  * struct drm_xe_engine - describe hardware engine
+ *
+ * The @capabilities can be:
+ *  - DRM_XE_ENGINE_CAPABILITY_WMTP - represents a engine's mid-thread
+ *  preemption capability.
  */
 struct drm_xe_engine {
 	/** @instance: The @drm_xe_engine_class_instance */
 	struct drm_xe_engine_class_instance instance;
-
+#define DRM_XE_ENGINE_CAPABILITY_WMTP		1
+	/** @capabilities: Capabilities of this engine. */
+	__u32 capabilities;
+	/** @pad: MBZ */
+	__u32 pad;
 	/** @reserved: Reserved */
-	__u64 reserved[3];
+	__u64 reserved[2];
 };
 
 /**
--
2.42.0


Acked-by: Mateusz Jablonski <mateusz.jablonski at intel.com>
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.

Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.