[PATCH 3/3] drm/i915/display: allow creation of Xe2 ccs framebuffers

[Kahola, Mika]

> -----Original Message-----
> From: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> Sent: Monday, August 12, 2024 11:15 PM
> To: intel-xe at lists.freedesktop.org
> Cc: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> Subject: [PATCH 3/3] drm/i915/display: allow creation of Xe2 ccs framebuffers
> 
> Add I915_FORMAT_MOD_4_TILED_BMG_CCS and
> I915_FORMAT_MOD_4_TILED_LNL_CCS to possible created modifier for new
> framebuffer on Xe driver.
> 

Reviewed-by: Mika Kahola <mika.kahola at intel.com>

> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c   |  2 ++
>  drivers/gpu/drm/i915/display/intel_fb.c        | 18 ++++++++++++++++++
>  .../gpu/drm/i915/display/skl_universal_plane.c |  5 +++++
>  3 files changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 9f2a4a854548..1042f65967ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6260,6 +6260,8 @@ static int intel_async_flip_check_hw(struct
> intel_atomic_state *state, struct in
>  		case I915_FORMAT_MOD_Y_TILED:
>  		case I915_FORMAT_MOD_Yf_TILED:
>  		case I915_FORMAT_MOD_4_TILED:
> +		case I915_FORMAT_MOD_4_TILED_BMG_CCS:
> +		case I915_FORMAT_MOD_4_TILED_LNL_CCS:
>  			break;
>  		default:
>  			drm_dbg_kms(&i915->drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index f23547a88b1f..d2716915d046 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -163,6 +163,14 @@ struct intel_modifier_desc {
> 
>  static const struct intel_modifier_desc intel_modifiers[] = {
>  	{
> +		.modifier = I915_FORMAT_MOD_4_TILED_LNL_CCS,
> +		.display_ver = { 20, -1 },
> +		.plane_caps = INTEL_PLANE_CAP_TILING_4,
> +	}, {
> +		.modifier = I915_FORMAT_MOD_4_TILED_BMG_CCS,
> +		.display_ver = { 14, -1 },
> +		.plane_caps = INTEL_PLANE_CAP_TILING_4,
> +	}, {
>  		.modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS,
>  		.display_ver = { 14, 14 },
>  		.plane_caps = INTEL_PLANE_CAP_TILING_4 |
> INTEL_PLANE_CAP_CCS_MC, @@ -437,6 +445,14 @@ static bool
> plane_has_modifier(struct drm_i915_private *i915,
>  	    HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
>  		return false;
> 
> +	if (md->modifier == I915_FORMAT_MOD_4_TILED_BMG_CCS &&
> +	    (GRAPHICS_VER(i915) < 20 || !IS_DGFX(i915)))
> +		return false;
> +
> +	if (md->modifier == I915_FORMAT_MOD_4_TILED_LNL_CCS &&
> +	    (GRAPHICS_VER(i915) < 20 || IS_DGFX(i915)))
> +		return false;
> +
>  	return true;
>  }
> 
> @@ -653,6 +669,8 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int
> color_plane)
>  			return 128;
>  		else
>  			return 512;
> +	case I915_FORMAT_MOD_4_TILED_BMG_CCS:
> +	case I915_FORMAT_MOD_4_TILED_LNL_CCS:
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>  	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index a1ab64db0130..0e81d540ecc9 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -537,6 +537,8 @@ static u32 tgl_plane_min_alignment(struct intel_plane
> *plane,
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>  	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
> +	case I915_FORMAT_MOD_4_TILED_BMG_CCS:
> +	case I915_FORMAT_MOD_4_TILED_LNL_CCS:
>  		/*
>  		 * Align to at least 4x1 main surface
>  		 * tiles (16K) to match 64B of AUX.
> @@ -948,6 +950,9 @@ static u32 skl_plane_ctl_tiling(u64 fb_modifier)
>  		return PLANE_CTL_TILED_4 |
> PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
>  	case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS:
>  		return PLANE_CTL_TILED_4 |
> PLANE_CTL_MEDIA_DECOMPRESSION_ENABLE;
> +	case I915_FORMAT_MOD_4_TILED_BMG_CCS:
> +	case I915_FORMAT_MOD_4_TILED_LNL_CCS:
> +		return PLANE_CTL_TILED_4 |
> PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
>  	case I915_FORMAT_MOD_Y_TILED_CCS:
>  	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
>  		return PLANE_CTL_TILED_Y |
> PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
> --
> 2.45.2