[PATCH 0/5] reg_sr/whitelist fixes and refactors
Lucas De Marchi
lucas.demarchi at intel.com
Thu Dec 5 18:22:35 UTC 2024
First patch is an important fix that we could eventually trip on (and it
did in this series because it increases the amount of save-restore
registers).
Second is more to maintain it consistent than anything else: if we don't
trust the HW defaults, what difference it makes if the engine has 1 or 0
whitelisted registers? The rest should be written to anyway. However,
I'm not happy with not trusting the HW default there: bspec says these
registers are power context saved/restored. So maybe we should add a
test to verify that's true and stop doing that? Or at least provide some
evidence this is needed because of a workaround or the like.
The other patches are what I was really intending to do in this series:
make the whitelist stop interacting with the HW. It instead collects the
registers and add them to the hwe's reg_sr. With that the mmio write
covers the hw interaction and there's no special code in xe_guc_ads.c to
communicate to GuC that these registers should survive an engine reset.
Lucas De Marchi (5):
drm/xe/reg_sr: Remove register pool
drm/xe/reg_sr: Write all whitelist slots
drm/xe: Add xe_gt_dbg_printer
drmxe/reg_sr: Convert whitelist to gt logging
drm/xe: Apply whitelist to engine save-restore
drivers/gpu/drm/xe/xe_gt.c | 4 +-
drivers/gpu/drm/xe/xe_gt_printk.h | 22 +++++++
drivers/gpu/drm/xe/xe_guc_ads.c | 7 ---
drivers/gpu/drm/xe/xe_hw_engine.c | 1 -
drivers/gpu/drm/xe/xe_reg_sr.c | 84 ++-------------------------
drivers/gpu/drm/xe/xe_reg_sr_types.h | 6 --
drivers/gpu/drm/xe/xe_reg_whitelist.c | 59 +++++++++++++++++++
7 files changed, 88 insertions(+), 95 deletions(-)
--
2.47.0
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