[PATCH 2/5] drm/xe/reg_sr: Write all whitelist slots

Lucas De Marchi lucas.demarchi at intel.com
Thu Dec 5 18:22:37 UTC 2024


Currently if there's 1 whitelisted register in the engine, on slot is
written with that register and all the others are written to a sane
value. For the free slots, there's no reason to change the behavior
if there are 0, 1 or slots occupied. If the default value from HW is not
trusted, all values should be written to.

Also, later on all values are passed to GuC via ADS to be restored on
engine reset, so make sure they are also written to when probing the
device.

Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
 drivers/gpu/drm/xe/xe_reg_sr.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index c13123008e903..f982c1cdb369c 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -204,9 +204,6 @@ void xe_reg_sr_apply_whitelist(struct xe_hw_engine *hwe)
 	unsigned int slot = 0;
 	unsigned int fw_ref;
 
-	if (xa_empty(&sr->xa))
-		return;
-
 	drm_dbg(&xe->drm, "Whitelisting %s registers\n", sr->name);
 
 	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
-- 
2.47.0



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