✗ CI.checkpatch: warning for PSR DSB support

[Patchwork]

== Series Details ==

Series: PSR DSB support
URL   : https://patchwork.freedesktop.org/series/142521/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 5ee9e5ec3322bb0ac189292e08f789ff1fe7b828
Author: Jouni Högander <jouni.hogander at intel.com>
Date:   Fri Dec 13 08:35:28 2024 +0200

    drm/i915/psr: Allow DSB usage when PSR is enabled
    
    Now as we have correct PSR2_MAN_TRK_CTL handling in place we can allow DSB
    usage also when PSR is enabled for LunarLake onwards.
    
    Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
+ /mt/dim checkpatch a4502e763bb931b68fa9be46262724a61ae951e3 drm-intel
12ca394560c1 drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update
3f4a2719726e drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update
617de7e5f021 drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update
b6902144db2e drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers
-:24: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#24: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:255:
+#define LNL_SFF_CTL(dev_priv, tran)				_MMIO_TRANS2(dev_priv, tran, _LNL_SFF_CTL_A)

-:28: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#28: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:259:
+#define LNL_CFF_CTL(dev_priv, tran)				_MMIO_TRANS2(dev_priv, tran, _LNL_CFF_CTL_A)

total: 0 errors, 2 warnings, 0 checks, 14 lines checked
e32a4f08293a drm/i915/psr: Ensure SFF/CFF bits are not written at their sample point
a2f374282532 drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards
6558d6ace50c drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB
73ee0a1f9ae9 drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use
-:17: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#17: 
Taking PSR lock over DSB commit is not needed because PSR2_MAN_TRK_CTL is now

total: 0 errors, 1 warnings, 0 checks, 17 lines checked
c51cdbc68d07 drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit
5ee9e5ec3322 drm/i915/psr: Allow DSB usage when PSR is enabled