[PATCH] drm/xe/sa: Drop hardcoded 4K guard in sub-allocator

Michal Wajdeczko michal.wajdeczko at intel.com
Wed Dec 18 19:42:36 UTC 2024



On 17.12.2024 23:39, Matthew Brost wrote:
> On Tue, Dec 17, 2024 at 11:22:46PM +0100, Michal Wajdeczko wrote:
>> Any required prefetch guards are added during batch buffer
>> allocations anyway.
>>
> 
> This should work but I think we actually want to do the opposite of
> this - drop the prefetch pad in BB allocation. This would enable a more

but this will make the SA even more bound to usages specific to engines,
while the goal was to make the allocator more agnostic

> optimial usage of each suballocation. I think that would work unless we
> have an odd caching issue - if caching is a problem then maybe the BB is
> a cacheline.
> 
> I haven't had time to try to out yet but I think we explore the above
> option first. If I'm missing something and the above does not work, then
> agree with this patch.
> 
> Matt
> 


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