[PATCH 0/2] Fixes for MI_REPORT_PERF_COUNT

[Umesh Nerlige Ramappa]

OA programming sequence for query mode or MI_REPORT_PERF_COUNT requires
modifying some HW registers in the same hw context as the user exec
queue. User passes the exec_queue to the OA interface and OA
implementation submits an MI_LOAD_REGISTER_IMM to this queue to modify
the registers.

The OA implementation submits a batch mapped in GGTT to the user exec
queue and hence, some plumbing is added into relevant code to enable
that (as per suggestions from Matthew Brost).

v2: review rework
v3:
- review rework
- original patches squashed for porting to stable
- code cleanup

opens:
- Should the cleanup patch be squashed as well and sent to stable? I have kept
  it separate hoping the build does not complain about dead code!!
- Applying these patches to stable is not clean since there is a dependency on
  another patch - "drm/xe: Force write completion of MI_STORE_DATA_IMM". Not
  sure if dependent patches need to be sent to stable as well.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

Umesh Nerlige Ramappa (2):
  xe/oa: Fix query mode of operation for OAR/OAC
  xe/oa: Drop the unused logic to parse context image

 drivers/gpu/drm/xe/xe_oa.c              | 223 +++++-------------------
 drivers/gpu/drm/xe/xe_oa_types.h        |   3 -
 drivers/gpu/drm/xe/xe_ring_ops.c        |   5 +-
 drivers/gpu/drm/xe/xe_sched_job_types.h |   2 +
 4 files changed, 53 insertions(+), 180 deletions(-)

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2.34.1