✗ CI.checkpatch: warning for drm/i915/dp: 128b/132b uncompressed SST (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dp: 128b/132b uncompressed SST (rev2)
URL   : https://patchwork.freedesktop.org/series/142548/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0f948d9c204e504911f15b15fc23d80422a6bf93
Author: Jani Nikula <jani.nikula at intel.com>
Date:   Thu Dec 19 23:34:05 2024 +0200

    drm/i915/dp: compute config for 128b/132b SST w/o DSC
    
    Enable basic 128b/132b SST functionality without compression. Reuse
    intel_dp_mtp_tu_compute_config() to figure out the TU after we've
    determined we need to use an UHBR rate.
    
    It's slightly complicated as the M/N computation is done in different
    places in MST and SST paths, so we need to avoid trashing the values
    later for UHBR.
    
    If uncompressed UHBR fails, we drop to compressed non-UHBR, which is
    quite likely to fail as well. We still lack 128b/132b SST+DSC.
    
    We need mst_master_transcoder also for 128b/132b SST. Use cpu_transcoder
    directly. Enhanced framing is "don't care" for 128b/132b link.
    
    v2: mst_master_transcoder, enhanced framing (Imre)
    
    Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+ /mt/dim checkpatch a5b4c40929f3263a92e34e3f6b3c3c0de57e0e58 drm-intel
c4ff9a40db7c drm/mst: remove mgr parameter and debug logging from drm_dp_get_vc_payload_bw()
956b04c3f5b9 drm/i915/mst: drop connector parameter from intel_dp_mst_bw_overhead()
65ae9dc9ac53 drm/i915/mst: drop connector parameter from intel_dp_mst_compute_m_n()
487accc35e19 drm/i915/mst: change return value of mst_stream_find_vcpi_slots_for_bpp()
cd96beebabff drm/i915/mst: remove crtc_state->pbn
996ab0bf0e2e drm/i915/mst: split out a helper for figuring out the TU
b9957f4d79c8 drm/i915/mst: adapt intel_dp_mtp_tu_compute_config() for 128b/132b SST
-:86: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#86: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:280:
+								      true, dsc_slice_count, link_bpp_x16);

total: 0 errors, 1 warnings, 0 checks, 128 lines checked
3570e72ed6a1 drm/i915/ddi: enable 128b/132b TRANS_DDI_FUNC_CTL mode for UHBR SST
160a671073a6 drm/i915/ddi: 128b/132b SST also needs DP_TP_CTL_MODE_MST
7f793b0f8e27 drm/i915/ddi: write payload for 128b/132b SST
95314a8273f1 drm/i915/ddi: initialize 128b/132b SST DP2 VFREQ registers
0e8c68363d64 drm/i915/ddi: enable ACT handling for 128b/132b SST
3efa924616bc drm/i915/ddi: start distinguishing 128b/132b SST and MST at state readout
48a13564b00d drm/i915/ddi: handle 128b/132b SST in intel_ddi_read_func_ctl()
f2911e76d47c drm/i915/ddi: disable trancoder port select for 128b/132b SST
0f948d9c204e drm/i915/dp: compute config for 128b/132b SST w/o DSC