[PATCH v5 2/2] xe/oa: Drop the unused logic to parse context image
Cavitt, Jonathan
jonathan.cavitt at intel.com
Fri Dec 20 18:09:50 UTC 2024
-----Original Message-----
From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Umesh Nerlige Ramappa
Sent: Friday, December 20, 2024 9:19 AM
To: intel-xe at lists.freedesktop.org; Dixit, Ashutosh <ashutosh.dixit at intel.com>
Cc: Souza, Jose <jose.souza at intel.com>
Subject: [PATCH v5 2/2] xe/oa: Drop the unused logic to parse context image
>
> Now that all register configurations are using MI_LOAD_REGISTER_IMM,
> drop the logic to parse context image for offset.
>
> v2: Remove unused lrc headers (Ashutosh)
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
> Reviewed-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
Sounds good:
Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
-Jonathan Cavitt
> ---
> drivers/gpu/drm/xe/xe_oa.c | 88 --------------------------------
> drivers/gpu/drm/xe/xe_oa_types.h | 3 --
> 2 files changed, 91 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index 9add60097ab5..4e00a77289c5 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -16,7 +16,6 @@
> #include "instructions/xe_mi_commands.h"
> #include "regs/xe_engine_regs.h"
> #include "regs/xe_gt_regs.h"
> -#include "regs/xe_lrc_layout.h"
> #include "regs/xe_oa_regs.h"
> #include "xe_assert.h"
> #include "xe_bb.h"
> @@ -28,7 +27,6 @@
> #include "xe_gt_mcr.h"
> #include "xe_gt_printk.h"
> #include "xe_guc_pc.h"
> -#include "xe_lrc.h"
> #include "xe_macros.h"
> #include "xe_mmio.h"
> #include "xe_oa.h"
> @@ -1673,81 +1671,6 @@ static const struct file_operations xe_oa_fops = {
> .mmap = xe_oa_mmap,
> };
>
> -static bool engine_supports_mi_query(struct xe_hw_engine *hwe)
> -{
> - return hwe->class == XE_ENGINE_CLASS_RENDER ||
> - hwe->class == XE_ENGINE_CLASS_COMPUTE;
> -}
> -
> -static bool xe_oa_find_reg_in_lri(u32 *state, u32 reg, u32 *offset, u32 end)
> -{
> - u32 idx = *offset;
> - u32 len = min(MI_LRI_LEN(state[idx]) + idx, end);
> - bool found = false;
> -
> - idx++;
> - for (; idx < len; idx += 2) {
> - if (state[idx] == reg) {
> - found = true;
> - break;
> - }
> - }
> -
> - *offset = idx;
> - return found;
> -}
> -
> -#define IS_MI_LRI_CMD(x) (REG_FIELD_GET(MI_OPCODE, (x)) == \
> - REG_FIELD_GET(MI_OPCODE, MI_LOAD_REGISTER_IMM))
> -
> -static u32 xe_oa_context_image_offset(struct xe_oa_stream *stream, u32 reg)
> -{
> - struct xe_lrc *lrc = stream->exec_q->lrc[0];
> - u32 len = (xe_gt_lrc_size(stream->gt, stream->hwe->class) +
> - lrc->ring.size) / sizeof(u32);
> - u32 offset = xe_lrc_regs_offset(lrc) / sizeof(u32);
> - u32 *state = (u32 *)lrc->bo->vmap.vaddr;
> -
> - if (drm_WARN_ON(&stream->oa->xe->drm, !state))
> - return U32_MAX;
> -
> - for (; offset < len; ) {
> - if (IS_MI_LRI_CMD(state[offset])) {
> - /*
> - * We expect reg-value pairs in MI_LRI command, so
> - * MI_LRI_LEN() should be even
> - */
> - drm_WARN_ON(&stream->oa->xe->drm,
> - MI_LRI_LEN(state[offset]) & 0x1);
> -
> - if (xe_oa_find_reg_in_lri(state, reg, &offset, len))
> - break;
> - } else {
> - offset++;
> - }
> - }
> -
> - return offset < len ? offset : U32_MAX;
> -}
> -
> -static int xe_oa_set_ctx_ctrl_offset(struct xe_oa_stream *stream)
> -{
> - struct xe_reg reg = OACTXCONTROL(stream->hwe->mmio_base);
> - u32 offset = stream->oa->ctx_oactxctrl_offset[stream->hwe->class];
> -
> - /* Do this only once. Failure is stored as offset of U32_MAX */
> - if (offset)
> - goto exit;
> -
> - offset = xe_oa_context_image_offset(stream, reg.addr);
> - stream->oa->ctx_oactxctrl_offset[stream->hwe->class] = offset;
> -
> - drm_dbg(&stream->oa->xe->drm, "%s oa ctx control at 0x%08x dword offset\n",
> - stream->hwe->name, offset);
> -exit:
> - return offset && offset != U32_MAX ? 0 : -ENODEV;
> -}
> -
> static int xe_oa_stream_init(struct xe_oa_stream *stream,
> struct xe_oa_open_param *param)
> {
> @@ -1785,17 +1708,6 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> else
> stream->oa_buffer.circ_size = param->oa_buffer_size;
>
> - if (stream->exec_q && engine_supports_mi_query(stream->hwe)) {
> - /* If we don't find the context offset, just return error */
> - ret = xe_oa_set_ctx_ctrl_offset(stream);
> - if (ret) {
> - drm_err(&stream->oa->xe->drm,
> - "xe_oa_set_ctx_ctrl_offset failed for %s\n",
> - stream->hwe->name);
> - goto exit;
> - }
> - }
> -
> stream->oa_config = xe_oa_get_oa_config(stream->oa, param->metric_set);
> if (!stream->oa_config) {
> drm_dbg(&stream->oa->xe->drm, "Invalid OA config id=%i\n", param->metric_set);
> diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
> index 2dcd3b9562e9..52e33c37d5ee 100644
> --- a/drivers/gpu/drm/xe/xe_oa_types.h
> +++ b/drivers/gpu/drm/xe/xe_oa_types.h
> @@ -138,9 +138,6 @@ struct xe_oa {
> /** @metrics_idr: List of dynamic configurations (struct xe_oa_config) */
> struct idr metrics_idr;
>
> - /** @ctx_oactxctrl_offset: offset of OACTXCONTROL register in context image */
> - u32 ctx_oactxctrl_offset[XE_ENGINE_CLASS_MAX];
> -
> /** @oa_formats: tracks all OA formats across platforms */
> const struct xe_oa_format *oa_formats;
>
> --
> 2.34.1
>
>
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