✗ CI.checkpatch: warning for drm/i915/cmtg: Disable the CMTG
Patchwork
patchwork at emeril.freedesktop.org
Mon Dec 23 21:15:58 UTC 2024
== Series Details ==
Series: drm/i915/cmtg: Disable the CMTG
URL : https://patchwork.freedesktop.org/series/142946/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 2fe6e624688156eb2fc537c6131888433799e673
Author: Gustavo Sousa <gustavo.sousa at intel.com>
Date: Mon Dec 23 18:10:04 2024 -0300
drm/i915/cmtg: Disable the CMTG
The CMTG is a timing generator that runs in parallel with transcoders
timing generators and can be used as a reference for synchronization.
On PTL (display Xe3_LPD), we have observed that we are inheriting from
GOP a display configuration with the CMTG enabled. Because our driver
doesn't currently implement any CMTG sequences, the CMTG ends up still
enabled after our driver takes over.
We need to make sure that the CMTG is not enabled if we are not going to
use it. For that, let's add a partial implementation in our driver that
only cares about disabling the CMTG if it was found enabled during
initial hardware readout. In the future, we can also implement sequences
for enabling CMTG if that becomes a needed feature.
For completeness, we do not only cover Xe3_LPD but also all previous
display IPs that provide the CMTG.
Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
+ /mt/dim checkpatch 8fd79761c1b6984d01b45a4bc8eb8ad81f6546e4 drm-intel
2fe6e6246881 drm/i915/cmtg: Disable the CMTG
-:38: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#38:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 497 lines checked
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