[PATCH 4/4] drm/i915/dmc_wl: Allow enable_dmc_wl=3 to mean "always locked"

Bhadane, Dnyaneshwar dnyaneshwar.bhadane at intel.com
Mon Dec 30 11:25:39 UTC 2024



> -----Original Message-----
> From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Gustavo
> Sousa
> Sent: Friday, December 20, 2024 3:44 AM
> To: intel-xe at lists.freedesktop.org; intel-gfx at lists.freedesktop.org
> Subject: [PATCH 4/4] drm/i915/dmc_wl: Allow enable_dmc_wl=3 to mean
> "always locked"
> 
> When debugging issues that might be related to the DMC wakelock code, it might
> be useful to compare runs with the lock acquired while DC states are enabled vs
> the regular case. If issues disappear with the former, it might be a symptom of
> something wrong in our code. Support having this "always locked" behavior with
> enable_dmc_wl=3.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane at intel.com>

Dnyaneshwar
> ---
>  drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_dmc_wl.c         | 7 ++++++-
>  2 files changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index f0f388f38fa7..c4f1ab43fc0c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -130,7 +130,7 @@
> intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> 
>  intel_display_param_named_unsafe(enable_dmc_wl, int, 0400,
>  	"Enable DMC wakelock "
> -	"(-1=use per-chip default, 0=disabled, 1=enabled, 2=match any register) "
> +	"(-1=use per-chip default, 0=disabled, 1=enabled, 2=match any register,
> 3=always locked) "
>  	"Default: -1");
> 
>  __maybe_unused
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> index 22e963da65c6..a277c5025f8d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> @@ -57,6 +57,7 @@ enum {
>  	ENABLE_DMC_WL_DISABLED,
>  	ENABLE_DMC_WL_ENABLED,
>  	ENABLE_DMC_WL_ANY_REGISTER,
> +	ENABLE_DMC_WL_ALWAYS_LOCKED,
>  	ENABLE_DMC_WL_MAX,
>  };
> 
> @@ -312,6 +313,9 @@ static void intel_dmc_wl_sanitize_param(struct
> intel_display *display)
>  	case ENABLE_DMC_WL_ANY_REGISTER:
>  		desc = "match any register";
>  		break;
> +	case ENABLE_DMC_WL_ALWAYS_LOCKED:
> +		desc = "always locked";
> +		break;
>  	default:
>  		desc = "unknown";
>  		break;
> @@ -332,7 +336,8 @@ void intel_dmc_wl_init(struct intel_display *display)
> 
>  	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
>  	spin_lock_init(&wl->lock);
> -	refcount_set(&wl->refcount, 0);
> +	refcount_set(&wl->refcount,
> +		     display->params.enable_dmc_wl ==
> ENABLE_DMC_WL_ALWAYS_LOCKED ? 1
> +: 0);
>  }
> 
>  /* Must only be called as part of enabling dynamic DC states. */
> --
> 2.47.1



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