[PATCH 2/3] drm/xe/pf: Request 64K aligned allocations for LMTT PD
Rodrigo Vivi
rodrigo.vivi at intel.com
Tue Feb 13 22:27:49 UTC 2024
On Tue, Feb 13, 2024 at 10:24:17PM +0100, Michal Wajdeczko wrote:
> Use explicit alignment flag to match hardware requirement.
Probably good to add here in the commit message:
"LMTT Directory must be aligned on a 64KB boundary in Local Memory,
as well as the directory entries for SRIOV."
or something like that.
But the patch itself looks correct to me.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>
> Bspec: 52404, 67468
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Michał Winiarski <michal.winiarski at intel.com>
> ---
> drivers/gpu/drm/xe/xe_lmtt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_lmtt.c b/drivers/gpu/drm/xe/xe_lmtt.c
> index 0d7c5514e092..dfb0e1887615 100644
> --- a/drivers/gpu/drm/xe/xe_lmtt.c
> +++ b/drivers/gpu/drm/xe/xe_lmtt.c
> @@ -71,7 +71,7 @@ static struct xe_lmtt_pt *lmtt_pt_alloc(struct xe_lmtt *lmtt, unsigned int level
> lmtt->ops->lmtt_pte_num(level)),
> ttm_bo_type_kernel,
> XE_BO_CREATE_VRAM_IF_DGFX(lmtt_to_tile(lmtt)) |
> - XE_BO_CREATE_PINNED_BIT);
> + XE_BO_NEEDS_64K | XE_BO_CREATE_PINNED_BIT);
> if (IS_ERR(bo)) {
> err = PTR_ERR(bo);
> goto out_free_pt;
> --
> 2.43.0
>
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