[PATCH v5 9/9] drm/xe: Implement capture of HWSP and HWCTX

Souza, Jose jose.souza at intel.com
Wed Feb 21 17:56:20 UTC 2024


On Wed, 2024-02-21 at 14:30 +0100, Maarten Lankhorst wrote:
> Capture both the HWSP and the HW ctx page to allow easier replaying of
> error dumps for debugging.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
>  drivers/gpu/drm/xe/xe_lrc.c | 60 ++++++++++++++++++++++++++++++++++++-
>  1 file changed, 59 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 20f235cdaca34..93c139f8d4fed 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -5,6 +5,8 @@
>  
>  #include "xe_lrc.h"
>  
> +#include <linux/ascii85.h>
> +
>  #include "instructions/xe_mi_commands.h"
>  #include "instructions/xe_gfxpipe_commands.h"
>  #include "regs/xe_engine_regs.h"
> @@ -32,6 +34,10 @@
>  #define ENGINE_INSTANCE_SHIFT			48
>  
>  struct xe_lrc_snapshot {
> +	struct xe_bo *lrc_bo;
> +	void *lrc_snapshot;
> +	unsigned long lrc_size, lrc_offset;
> +
>  	u32 context_desc;
>  	u32 head;
>  	struct {
> @@ -1333,19 +1339,43 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
>  	snapshot->tail.memory = xe_lrc_read_ctx_reg(lrc, CTX_RING_TAIL);
>  	snapshot->start_seqno = xe_lrc_start_seqno(lrc);
>  	snapshot->seqno = xe_lrc_seqno(lrc);
> +	snapshot->lrc_bo = xe_bo_get(lrc->bo);
> +	snapshot->lrc_offset = xe_lrc_pphwsp_offset(lrc);
> +	snapshot->lrc_size = lrc->bo->size - snapshot->lrc_offset;
> +	snapshot->lrc_snapshot = NULL;
>  	return snapshot;
>  }
>  
>  void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot)
>  {
> +	struct xe_bo *bo;
> +	struct iosys_map src;
> +
>  	if (!snapshot)
>  		return;
>  
> -	/* TODO: Copy status page */
> +	bo = snapshot->lrc_bo;
> +	snapshot->lrc_snapshot = kvmalloc(snapshot->lrc_size, GFP_KERNEL);
> +	if (!snapshot->lrc_snapshot)
> +		return;
> +
> +	dma_resv_lock(bo->ttm.base.resv, NULL);
> +	if (!ttm_bo_vmap(&bo->ttm, &src)) {
> +		xe_map_memcpy_from(xe_bo_device(bo),
> +				   snapshot->lrc_snapshot, &src, snapshot->lrc_offset,
> +				   snapshot->lrc_size);
> +		ttm_bo_vunmap(&bo->ttm, &src);
> +	} else {
> +		kvfree(snapshot->lrc_snapshot);
> +		snapshot->lrc_snapshot = NULL;
> +	}
> +	dma_resv_unlock(bo->ttm.base.resv);
>  }
>  
>  void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer *p)
>  {
> +	unsigned long i;
> +
>  	if (!snapshot)
>  		return;
>  
> @@ -1355,9 +1385,37 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
>  		   snapshot->tail.internal, snapshot->tail.memory);
>  	drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno);
>  	drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
> +
> +	if (!snapshot->lrc_snapshot)
> +		return;
> +
> +	drm_printf(p, "\t HWSP length: 0x%x\n", LRC_PPHWSP_SIZE);
> +	drm_puts(p, "\tHWSP data: ");

drm_printf(p, "\t[HWSP].length: 0x%x\n", LRC_PPHWSP_SIZE);
drm_puts(p, "\t[HWSP].data: ");

to make it consistent with VM state


> +
> +	for (i = 0; i < LRC_PPHWSP_SIZE; i += sizeof(u32)) {
> +		u32 *val = snapshot->lrc_snapshot + i;
> +		char dumped[ASCII85_BUFSZ];
> +
> +		drm_puts(p, ascii85_encode(*val, dumped));
> +	}

new line here

> +	drm_printf(p, "\n\tHWCTX length: 0x%lx\n", snapshot->lrc_size - LRC_PPHWSP_SIZE);
> +	drm_puts(p, "\tHWCTX data: ");

drm_printf(p, "\n\t[HWCTX].length: 0x%lx\n", snapshot->lrc_size - LRC_PPHWSP_SIZE);
drm_puts(p, "\t[HWCTX].data: ");

> +	for (; i < snapshot->lrc_size; i += sizeof(u32)) {
> +		u32 *val = snapshot->lrc_snapshot + i;
> +		char dumped[ASCII85_BUFSZ];
> +
> +		drm_puts(p, ascii85_encode(*val, dumped));
> +	}
> +	drm_puts(p, "\n");
>  }
>  
>  void xe_lrc_snapshot_free(struct xe_lrc_snapshot *snapshot)
>  {
> +	if (!snapshot)
> +		return;
> +
> +	kvfree(snapshot->lrc_snapshot);
> +	if (snapshot->lrc_bo)
> +		xe_bo_put(snapshot->lrc_bo);
>  	kfree(snapshot);
>  }



More information about the Intel-xe mailing list