[PATCH 5/5] drm/xe/mocs: Fix DG2 kunit

Matt Roper matthew.d.roper at intel.com
Thu Feb 29 21:31:26 UTC 2024


On Tue, Feb 27, 2024 at 10:10:48PM -0800, Lucas De Marchi wrote:
> LNCFCMOCS31[31:16] is read-only for DG2 and MTL, so it's not possible to
> check set it. While trying to set doesn't cause any issue, later when
> it's read back to check if the value got correctly recorded causes the
> test to fail. Now that test is reliable for an odd number of entries,
> reduce it so the last entry is ignored.
> 
> Bspec: 55267
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1253
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1233
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_mocs.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
> index 60ab34fd213fb..f56f630fa29d0 100644
> --- a/drivers/gpu/drm/xe/xe_mocs.c
> +++ b/drivers/gpu/drm/xe/xe_mocs.c
> @@ -72,7 +72,7 @@ struct xe_mocs_info {
>  /* Helper defines */
>  #define XELP_NUM_MOCS_ENTRIES	64  /* 63-64 are reserved, but configured. */
>  #define PVC_NUM_MOCS_ENTRIES	3
> -#define MTL_NUM_MOCS_ENTRIES    16
> +#define MTL_NUM_MOCS_ENTRIES	16
>  #define XE2_NUM_MOCS_ENTRIES	16
>  
>  /* (e)LLC caching options */
> @@ -401,7 +401,11 @@ static unsigned int get_mocs_settings(struct xe_device *xe,
>  		info->size = ARRAY_SIZE(dg2_mocs_desc);
>  		info->table = dg2_mocs_desc;
>  		info->uc_index = 1;
> -		info->n_entries = XELP_NUM_MOCS_ENTRIES;
> +		/*
> +		 * Last entry is RO on hardware, don't bother with what was
> +		 * written when checking later
> +		 */
> +		info->n_entries = XELP_NUM_MOCS_ENTRIES - 1;
>  		info->unused_entries_index = 3;
>  		break;
>  	case XE_DG1:
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation


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