[PATCH v2 3/4] drm/xe: Add build on bug to assert access counter queue works

Lucas De Marchi lucas.demarchi at intel.com
Wed Jan 10 20:28:57 UTC 2024


On Tue, Jan 09, 2024 at 05:24:38PM -0800, Matthew Brost wrote:
>If ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW != 0 then the access counter queue
>logic does not work when wrapping occurs. Add a build bug on to assert
>ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW == 0 to enforce this restriction and
>document the code.
>
>v2:
>- s/NUM_ACC_QUEUE/ACC_QUEUE_NUM_DW (Brian)
>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Signed-off-by: Matthew Brost <matthew.brost at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/xe/xe_gt_pagefault.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
>index 3ca715e2ec19..13183088401f 100644
>--- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
>+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
>@@ -629,6 +629,11 @@ int xe_guc_access_counter_notify_handler(struct xe_guc *guc, u32 *msg, u32 len)
> 	u32 asid;
> 	bool full;
>
>+	/*
>+	 * The below logic doesn't work unless ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW == 0
>+	 */
>+	BUILD_BUG_ON(ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW);
>+
> 	if (unlikely(len != ACC_MSG_LEN_DW))
> 		return -EPROTO;
>
>-- 
>2.34.1
>


More information about the Intel-xe mailing list