[PATCH] drm/xe/guc: Enable WA 14018913170

[Nilawar, Badal]

On 17-01-2024 11:20, Karthik Poosa wrote:
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
> 
> v2:
>    - Fixed CI checkpatch warning, alignment should match open parenthesis.
>    - Fixed GUC FW version check to use XE_UC_FW_VER_RELEASE which points to
>      current GUC FW version instead of XE_UC_FW_VER_COMPATIBILITY which
>      holds GUC FW I/F version (Badal).
> v3:
>    - Removed extra character in debug print.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa at intel.com>

LGTM
Reviewed-by: Badal Nilawar <badal.nilawar at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_guc.c        | 13 +++++++++++++
>   drivers/gpu/drm/xe/xe_guc_fwif.h   |  1 +
>   drivers/gpu/drm/xe/xe_wa_oob.rules |  5 +++++
>   3 files changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 235d27b17ff9..2891b0cc4f7f 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
>   	return flags;
>   }
>   
> +#define GUC_VER(maj, min, pat)	(((maj) << 16) | ((min) << 8) | (pat))
> +
>   static u32 guc_ctl_wa_flags(struct xe_guc *guc)
>   {
>   	struct xe_device *xe = guc_to_xe(guc);
>   	struct xe_gt *gt = guc_to_gt(guc);
> +	struct xe_uc_fw *uc_fw = &guc->fw;
> +	struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
> +
>   	u32 flags = 0;
>   
>   	if (XE_WA(gt, 22012773006))
> @@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
>   	if (XE_WA(gt, 1509372804))
>   		flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>   
> +	if (XE_WA(gt, 14018913170)) {
> +		if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
> +			flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> +		else
> +			drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %u %u %u\n",
> +				 version->major, version->minor, version->patch);
> +	}
> +
>   	return flags;
>   }
>   
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 4dd5a88a7826..c281fdbfd2d6 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
>   #define   GUC_WA_POLLCS			BIT(18)
>   #define   GUC_WA_RENDER_RST_RC6_EXIT	BIT(19)
>   #define   GUC_WA_RCS_REGS_IN_CCS_REGS_LIST	BIT(21)
> +#define   GUC_WA_ENABLE_TSC_CHECK_ON_RC6	BIT(22)
>   
>   #define GUC_CTL_FEATURE			2
>   #define   GUC_CTL_ENABLE_SLPC		BIT(2)
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index e73b84e01ea1..b138cbd51bdb 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -17,3 +17,8 @@
>   14019821291	MEDIA_VERSION_RANGE(1300, 2000)
>   14015076503	MEDIA_VERSION(1300)
>   16020292621	GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +14018913170	GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +		MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
> +		GRAPHICS_VERSION_RANGE(1270, 1274)
> +		MEDIA_VERSION(1300)
> +		PLATFORM(DG2)