[PATCH v2] drm/xe/irq: allocate all possible msix interrupts
Dani Liberman
dliberman at habana.ai
Tue Jan 23 07:00:51 UTC 2024
On 22/01/2024 13:05, Ghimiray, Himal Prasad wrote:
On 21-01-2024 14:32, Dani Liberman wrote:
If platform supports MSIX, driver needs to allocate all possible
interrupts.
v2:
- drop msix_cap and use the api return code instead.
- fix commit message.
Cc: Ohad Sharabi <osharabi at habana.ai><mailto:osharabi at habana.ai>
Cc: Lucas De Marchi <lucas.demarchi at intel.com><mailto:lucas.demarchi at intel.com>
Signed-off-by: Dani Liberman <dliberman at habana.ai><mailto:dliberman at habana.ai>
---
drivers/gpu/drm/xe/xe_irq.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 907c8ff0fa21..7a23d25c1062 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -662,7 +662,7 @@ int xe_irq_install(struct xe_device *xe)
{
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
irq_handler_t irq_handler;
- int err, irq;
+ int err, irq, nvec;
irq_handler = xe_irq_handler(xe);
if (!irq_handler) {
@@ -672,7 +672,18 @@ int xe_irq_install(struct xe_device *xe)
xe_irq_reset(xe);
- err = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI | PCI_IRQ_MSIX);
+ nvec = pci_msix_vec_count(pdev);
+ if (nvec <= 0) {
+ if (nvec == -EINVAL) {
+ /* MSIX capability is not supported in the device, using MSI */
+ nvec = 1;
+ } else {
+ drm_err(&xe->drm, "MSIX: Failed getting count\n");
+ return nvec;
+ }
+ }
+
+ err = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_MSI | PCI_IRQ_MSIX);
Shouldn't the parameter be only PCI_IRQ_MSI in case nvec == EINVAL ?
The api will try msix with msi fallback, so it will work.
But since I distinguish already between msix and msi to get nvec, I will do the same for irq flags.
if (err < 0) {
drm_err(&xe->drm, "MSI/MSIX: Failed to enable support %d\n", err);
return err;
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