✗ CI.checkpatch: warning for series starting with [1/2] drm/xe: Add SVG state table for Xe2
Patchwork
patchwork at emeril.freedesktop.org
Mon Jan 29 19:49:29 UTC 2024
== Series Details ==
Series: series starting with [1/2] drm/xe: Add SVG state table for Xe2
URL : https://patchwork.freedesktop.org/series/129280/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
35591fb8b4d5305b37ce31483f85ac0956eaa536
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit fe4ac49a5456241680caddbc5e37e46451c7590a
Author: José Roberto de Souza <jose.souza at intel.com>
Date: Mon Jan 29 11:46:15 2024 -0800
drm/xe: Use functions to emit PIPE_CONTROL
This reduces boring code duplicating in xe_ring_ops.
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
+ /mt/dim checkpatch f4c0dac89bd3cd02a1afe5e7a91ed4bf8de4afc6 drm-intel
db09689d5 drm/xe: Add SVG state table for Xe2
-:9: WARNING:TYPO_SPELLING: 'lenght' may be misspelled - perhaps 'length'?
#9:
3DSTATE_HS has a different lenght than gfx1255+ platforms.
^^^^^^
total: 0 errors, 1 warnings, 0 checks, 74 lines checked
fe4ac49a5 drm/xe: Use functions to emit PIPE_CONTROL
-:21: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#21: FILE: drivers/gpu/drm/xe/xe_ring_ops.c:116:
+static int emit_pipe_control_full(u32 *dw, int i, u32 bit_group_0, u32 bit_group_1, u32 offset, u32 value)
total: 0 errors, 1 warnings, 0 checks, 91 lines checked
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