✓ CI.checkpatch: success for RFC drm/xe/xe_gt_idle: Expose Coarse power gating sysfs entries
Patchwork
patchwork at emeril.freedesktop.org
Mon Jul 15 09:47:19 UTC 2024
== Series Details ==
Series: RFC drm/xe/xe_gt_idle: Expose Coarse power gating sysfs entries
URL : https://patchwork.freedesktop.org/series/136085/
State : success
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b32bd135a65a40eda52269f1d1fe6e954df152bb
Author: Riana Tauro <riana.tauro at intel.com>
Date: Mon Jul 15 15:24:55 2024 +0530
RFC drm/xe/xe_gt_idle: Expose Coarse power gating sysfs entries
Add coarse power gating sysfs interface under gtidle directory to
display the powergate properties.
powergate sysfs directory will be enumerated for render and media
if present.
The new entries will have the below layout
tile<n>/gt<n>/gtidle/
├── powergate0
│ ├── enabled
│ ├── status
│ └── type
└── powergate<n>
├── enabled
├── status
└── type
type: type of powergate [Render or Media]
enabled: true if powergate is enabled for the type
status: Indicates status of powergate [Up/Down]
For type media, status is "Up" if any of the media
slices are powered on.
Signed-off-by: Riana Tauro <riana.tauro at intel.com>
+ /mt/dim checkpatch 2a1af781369347d1a4077a51f32c331cba1589b6 drm-intel
b32bd135a65a RFC drm/xe/xe_gt_idle: Expose Coarse power gating sysfs entries
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