✓ CI.checkpatch: success for Add MSIX functionality to XE (rev5)

[Patchwork]

== Series Details ==

Series: Add MSIX functionality to XE (rev5)
URL   : https://patchwork.freedesktop.org/series/135422/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6313646e848f5401cbd78ca6da1a1f09e3d32c77
Author: Ilia Levi <ilia.levi at intel.com>
Date:   Wed Jul 17 10:32:23 2024 +0300

    drm/xe: msix support for hw engines
    
    For devices that support MSI-X, we would like to be able to configure
    the hw engines to use it. This patch programs the lrc to set the MSI-X
    vector (new CS_INT_VEC field) provided by the exec queue, the pointers to
    interrupt status/source (using memirq, similarly to vf) and enables MSI-X
    mode for the hw engine.
    
    MSI-X vector 0 is used for GuC-to-host interrupt.
    
    bspec: 60342, 72547
    
    Signed-off-by: Ilia Levi <ilia.levi at intel.com>
+ /mt/dim checkpatch 5ed026e3fb07d65872ef64a5428746a0142e13b0 drm-intel
699f8c593feb drm/xe/irq: refactor irq flows to support also msix
41f4ceadd581 drm/xe/irq: add msix allocator
8dffe6decb17 drm/xe: add irq offset of engine instance 0 to hw engine properties
67e20a6e2b1e drm/xe: move memirq out of vf
a81b105b3540 drm/xe: memirq infra changes for msix
504d422a9a15 drm/xe/irq: add hw engine irq handler
579c9518cd1b drm/xe: move the kernel lrc from hwe to execlist port
9058a81370fc drm/xe: msix support preparations - enable memirq
3afcc9f7109c drm/xe/exec: adding msix infra to exec queue
427f6af9b33d drm/xe/irq: add default msix
6313646e848f drm/xe: msix support for hw engines