✓ CI.checkpatch: success for Keep device awake TLB invalidations and G2H in flight (rev3)

Patchwork patchwork at emeril.freedesktop.org
Fri Jul 19 17:33:39 UTC 2024


== Series Details ==

Series: Keep device awake TLB invalidations and G2H in flight (rev3)
URL   : https://patchwork.freedesktop.org/series/136256/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
5ce3e132caaa5b45e5e50201b574a097d130967c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 41a3818989a16f3ed42a88c4b5a11e9e98115253
Author: Matthew Brost <matthew.brost at intel.com>
Date:   Fri Jul 19 10:29:05 2024 -0700

    drm/xe: Build PM into GuC CT layer
    
    Take PM ref when any G2H are outstanding, drop when none are
    outstanding.
    
    To safely ensure we have PM ref when in the GuC CT layer, a PM ref needs
    to be held when scheduler messages are pending too.
    
    v2:
     - Add outer PM protections to xe_file_close (CI)
    v3:
     - Only take PM ref 0->1 and drop on 1->0 (Matthew Auld)
    v4:
     - Add assert to G2H increment function
    v5:
     - Rebase
    v6:
     - Declare xe as local variable in xe_file_close (CI)
    
    Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
    Cc: Matthew Auld <matthew.auld at intel.com>
    Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
    Cc: Nirmoy Das <nirmoy.das at intel.com>
    Signed-off-by: Matthew Brost <matthew.brost at intel.com>
    Reviewed-by: Matthew Auld <matthew.auld at intel.com>
    Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>
+ /mt/dim checkpatch eb6045a759ea13e8d159bdaea423e904b9e3717b drm-intel
83237c2fbbbc drm/xe: Add xe_gt_tlb_invalidation_fence_init helper
a6ccc144bdc2 drm/xe: Drop xe_gt_tlb_invalidation_wait
1b988095b52b drm/xe: Hold a PM ref when GT TLB invalidations are inflight
41a3818989a1 drm/xe: Build PM into GuC CT layer




More information about the Intel-xe mailing list