✓ CI.checkpatch: success for drm/xe/xe2: Enable Priority Mem Read (rev6)
Patchwork
patchwork at emeril.freedesktop.org
Tue Jul 23 23:28:01 UTC 2024
== Series Details ==
Series: drm/xe/xe2: Enable Priority Mem Read (rev6)
URL : https://patchwork.freedesktop.org/series/134038/
State : success
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
5ce3e132caaa5b45e5e50201b574a097d130967c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b7944a6e06a87173bd60d016b337ad41c6ad6ddb
Author: Pallavi Mishra <pallavi.mishra at intel.com>
Date: Wed Jul 24 05:01:31 2024 +0530
drm/xe/xe2: Enable Priority Mem Read
Enable feature to allow memory reads to take a priority memory path.
This will reduce latency on the read path, but may introduce read after
write (RAW) hazards as read and writes will no longer be ordered.
To avoid RAW hazards, SW can use the MI_MEM_FENCE command or any other
MI command that generates non posted memory writes. This will ensure
data is coherent in memory prior to execution of commands which read
data from memory.
No pattern identified in KMD that could lead to a hazard.
v2: Modify commit message, enable priority mem read feature for media,
modify version range, modify bspec detail (Matt Roper)
v3: Rebase, fix cramped line-wrapping (jcavitt)
v4: Rebase
Bspec: 60298, 60237, 60187, 60188
Signed-off-by: Pallavi Mishra <pallavi.mishra at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
Acked-by: José Roberto de Souza <jose.souza at intel.com>
Acked-by: Carl Zhang <carl.zhang at intel.com>
+ /mt/dim checkpatch b4f66aefb5cd89dc39e187d6c622f1493630eb08 drm-intel
b7944a6e06a8 drm/xe/xe2: Enable Priority Mem Read
More information about the Intel-xe
mailing list