✓ CI.checkpatch: success for drm/xe/xe_gt_idle: add debugfs entry for powergating info

[Patchwork]

== Series Details ==

Series: drm/xe/xe_gt_idle: add debugfs entry for powergating info
URL   : https://patchwork.freedesktop.org/series/136477/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
5ce3e132caaa5b45e5e50201b574a097d130967c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8063fc5a825cb2b35ee222b43824dc4878a44e62
Author: Riana Tauro <riana.tauro at intel.com>
Date:   Thu Jul 25 13:05:07 2024 +0530

    drm/xe/xe_gt_idle: add debugfs entry for powergating info
    
    Coarse Powergating is a power saving technique where Render and Media
    can be power-gated independently irrespective of the rest of the GT.
    
    For debug purposes, it is useful to expose the powergating information.
    
    v2: move to debugfs
        add details to commit message
        add per-slice status for media
        define reg bits in descending order (Matt Roper)
    
    Signed-off-by: Riana Tauro <riana.tauro at intel.com>
+ /mt/dim checkpatch 724a2a53988a57709d7f9dcd5c58dd5737d45cb2 drm-intel
8063fc5a825c drm/xe/xe_gt_idle: add debugfs entry for powergating info