✓ CI.checkpatch: success for Add MSIX functionality to XE (rev6)

[Patchwork]

== Series Details ==

Series: Add MSIX functionality to XE (rev6)
URL   : https://patchwork.freedesktop.org/series/135422/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
5ce3e132caaa5b45e5e50201b574a097d130967c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 491739e6447618fafee864b9ec3cedcf17cf5531
Author: Ilia Levi <ilia.levi at intel.com>
Date:   Thu Jul 25 13:22:13 2024 +0300

    drm/xe: msix support for hw engines
    
    For devices that support MSI-X, we would like to be able to configure
    the hw engines to use it. This patch programs the lrc to set the MSI-X
    vector (new CS_INT_VEC field) provided by the exec queue, the pointers to
    interrupt status/source (using memirq, similarly to vf) and enables MSI-X
    mode for the hw engine.
    
    MSI-X vector 0 is used for GuC-to-host interrupt.
    
    bspec: 60342, 72547
    
    Signed-off-by: Ilia Levi <ilia.levi at intel.com>
+ /mt/dim checkpatch 392b0a1dbe0179b3489fddd3c7e91508f833db41 drm-intel
08da4ca5e80b drm/xe/irq: refactor irq flows to support also msix
f1a0c353f1c5 drm/xe/irq: add msix allocator
acf8a1584666 drm/xe: add irq offset of engine instance 0 to hw engine properties
f054e92581bf drm/xe: move memirq out of vf
45d89aae5140 drm/xe: memirq infra changes for msix
036a66e87baa drm/xe/irq: add hw engine irq handler
0af00a555d53 drm/xe: move the kernel lrc from hwe to execlist port
b82dbb1e5bd1 drm/xe: msix support preparations - enable memirq
72ed459fa7f7 drm/xe/exec: adding msix infra to exec queue
3ff6b05d0b2c drm/xe/irq: add default msix
491739e64476 drm/xe: msix support for hw engines