[Intel-xe] [PATCH v4] drm/xe/xe2: Enable Priority Mem Read

[Mishra, Pallavi]

> -----Original Message-----
> From: Zhang, Carl <carl.zhang at intel.com>
> Sent: Wednesday, July 24, 2024 7:12 PM
> To: Mishra, Pallavi <pallavi.mishra at intel.com>; intel-xe at lists.freedesktop.org
> Cc: Roper, Matthew D <matthew.d.roper at intel.com>; Souza, Jose
> <jose.souza at intel.com>; Cavitt, Jonathan <jonathan.cavitt at intel.com>
> Subject: RE: [Intel-xe] [PATCH v4] drm/xe/xe2: Enable Priority Mem Read
> 
> Hi Pallavi,
> According our discussion, and  this feature only available with RCS, CCS and
> BCS , suppose we could remove media  related code?

Just sent out the latest version with the change as per latest update from HW team.

Thanks,
Pallavi
> 
> Thanks
> Carl
> 
> > -----Original Message-----
> > From: Mishra, Pallavi <pallavi.mishra at intel.com>
> > Sent: Wednesday, July 24, 2024 7:32 AM
> > To: intel-xe at lists.freedesktop.org
> > Cc: Roper, Matthew D <matthew.d.roper at intel.com>; Souza, Jose
> > <jose.souza at intel.com>; Zhang, Carl <carl.zhang at intel.com>; Cavitt,
> > Jonathan <jonathan.cavitt at intel.com>; Mishra, Pallavi
> > <pallavi.mishra at intel.com>
> > Subject: [Intel-xe] [PATCH v4] drm/xe/xe2: Enable Priority Mem Read
> >
> > Enable feature to allow memory reads to take a priority memory path.
> > This will reduce latency on the read path, but may introduce read
> > after write
> > (RAW) hazards as read and writes will no longer be ordered.
> >
> > To avoid RAW hazards, SW can use the MI_MEM_FENCE command or any
> other
> > MI command that generates non posted memory writes.  This will ensure
> > data is coherent in memory prior to execution of commands which read
> > data from memory.
> >
> > No pattern identified in KMD that could lead to a hazard.
> >
> > v2: Modify commit message, enable priority mem read feature for media,
> > modify version range, modify bspec detail (Matt Roper)
> >
> > v3: Rebase, fix cramped line-wrapping (jcavitt)
> >
> > v4: Rebase
> >
> > Bspec: 60298, 60237, 60187, 60188
> >
> > Signed-off-by: Pallavi Mishra <pallavi.mishra at intel.com>
> > Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> > Acked-by: José Roberto de Souza <jose.souza at intel.com>
> > Acked-by: Carl Zhang <carl.zhang at intel.com>
> > ---
> >  drivers/gpu/drm/xe/regs/xe_engine_regs.h |  1 +
> >  drivers/gpu/drm/xe/xe_hw_engine.c        | 11 +++++++++++
> >  2 files changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > index c38db2a74614..81b71903675e 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > @@ -104,6 +104,7 @@
> >  #define CSFE_CHICKEN1(base)			XE_REG((base) +
> 0xd4,
> > XE_REG_OPTION_MASKED)
> >  #define   GHWSP_CSB_REPORT_DIS			REG_BIT(15)
> >  #define   PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS	REG_BIT(14)
> > +#define   CS_PRIORITY_MEM_READ			REG_BIT(7)
> >
> >  #define FF_SLICE_CS_CHICKEN1(base)		XE_REG((base) +
> 0xe0,
> > XE_REG_OPTION_MASKED)
> >  #define   FFSC_PERCTX_PREEMPT_CTRL		REG_BIT(14)
> > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c
> > b/drivers/gpu/drm/xe/xe_hw_engine.c
> > index 07ed9fd28f19..5483deaab1bd 100644
> > --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> > @@ -425,6 +425,17 @@ hw_engine_setup_default_state(struct
> > xe_hw_engine *hwe)
> >  					   0xA,
> >
> > XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> >  		},
> > +		/* Enable Priority Mem Read */
> > +		{ XE_RTP_NAME("Priority_Mem_Read"),
> > +		  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001,
> > XE_RTP_END_VERSION_UNDEFINED)),
> > +		  XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
> > CS_PRIORITY_MEM_READ,
> > +				     XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> > +		},
> > +		{ XE_RTP_NAME("Priority_Mem_Read_For_Media"),
> > +		  XE_RTP_RULES(MEDIA_VERSION_RANGE(1301,
> > XE_RTP_END_VERSION_UNDEFINED)),
> > +		  XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
> > CS_PRIORITY_MEM_READ,
> > +				     XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> > +		},
> >  		{}
> >  	};
> >
> > --
> > 2.25.1