[PATCH 09/21] drm/xe: Add EUDEBUG_ENABLE exec queue property
Matthew Brost
matthew.brost at intel.com
Sat Jul 27 00:54:24 UTC 2024
On Fri, Jul 26, 2024 at 05:08:06PM +0300, Mika Kuoppala wrote:
> From: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
>
> Introduce exec queue immutable property of eudebug
> with a flags as value to enable eudebug specific feature(s).
>
> For now engine lrc will use this flag to set up runalone
> hw feature. Runalone is used to ensure that only one hw engine
> of group [rcs0, ccs0-3] is active on a tile.
>
> Note: unlike the i915, xe allows user to set runalone
> also on devices with single render/compute engine. It should not
> make much difference, but leave control to the user.
>
> v2: use exec queue flags (Mika)
> v3: eudebug enable as flags (Mika)
> v4: adapt to lrc_create (Mika)
> v5: EUDEBUG property space squash (Mika)
> v6: runalone as rmw (Dominik)
>
> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_engine_regs.h | 1 +
> drivers/gpu/drm/xe/xe_exec_queue.c | 35 ++++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_exec_queue_types.h | 7 +++++
> drivers/gpu/drm/xe/xe_hw_engine.c | 2 +-
> drivers/gpu/drm/xe/xe_lrc.c | 16 +++++++++--
> drivers/gpu/drm/xe/xe_lrc.h | 4 ++-
> include/uapi/drm/xe_drm.h | 3 +-
> 7 files changed, 60 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index fd31f3fb2b4c..764c270599d0 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -136,6 +136,7 @@
> #define CTX_CTRL_OAC_CONTEXT_ENABLE REG_BIT(8)
> #define CTX_CTRL_RUN_ALONE REG_BIT(7)
> #define CTX_CTRL_INDIRECT_RING_STATE_ENABLE REG_BIT(4)
> +#define CTX_CTRL_RUN_ALONE REG_BIT(7)
> #define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH REG_BIT(3)
> #define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT REG_BIT(0)
>
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 26ae2fdbf682..bc2edade5e5b 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -106,10 +106,14 @@ static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe,
>
> static int __xe_exec_queue_init(struct xe_exec_queue *q)
> {
> + u32 flags = 0;
> int i, err;
>
> + if (q->eudebug_flags & EXEC_QUEUE_EUDEBUG_FLAG_ENABLE)
> + flags |= LRC_CREATE_RUNALONE;
> +
> for (i = 0; i < q->width; ++i) {
> - q->lrc[i] = xe_lrc_create(q->hwe, q->vm, SZ_16K);
> + q->lrc[i] = xe_lrc_create(q->hwe, q->vm, SZ_16K, flags);
> if (IS_ERR(q->lrc[i])) {
> err = PTR_ERR(q->lrc[i]);
> goto err_lrc;
> @@ -336,6 +340,31 @@ static int exec_queue_set_timeslice(struct xe_device *xe, struct xe_exec_queue *
> return 0;
> }
>
> +static int exec_queue_set_eudebug(struct xe_device *xe, struct xe_exec_queue *q,
> + u64 value)
> +{
> + const u64 known_flags = DRM_XE_EXEC_QUEUE_EUDEBUG_FLAG_ENABLE;
> +
> + if (XE_IOCTL_DBG(xe, (q->class != XE_ENGINE_CLASS_RENDER &&
> + q->class != XE_ENGINE_CLASS_COMPUTE)))
> + return -EINVAL;
> +
> + if (XE_IOCTL_DBG(xe, (value & ~known_flags)))
> + return -EINVAL;
> +
Since I've talked about layering a bit [1] [2] it worth mentioning I
think this patch fine wrt layering.
If we add a Kconfig as I suggest [1] here you'd wanna add something
like:
if (!IS_ENABLED(CONFIG_EU_DEBUG))
return -EOPNOTSUPP;
Just make sure it is unique error code return which the UMD can
interrupt as 'kernel not compiled with EU debug support'.
Matt
[1] https://patchwork.freedesktop.org/patch/606049/?series=136572&rev=1#comment_1101330
[2] https://patchwork.freedesktop.org/patch/606056/?series=136572&rev=1#comment_1101337
> + /*
> + * We want to explicitly set the global feature if
> + * property is set.
> + */
> + if (XE_IOCTL_DBG(xe,
> + !(value & DRM_XE_EXEC_QUEUE_EUDEBUG_FLAG_ENABLE)))
> + return -EINVAL;
> +
> + q->eudebug_flags = EXEC_QUEUE_EUDEBUG_FLAG_ENABLE;
> +
> + return 0;
> +}
> +
> typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
> struct xe_exec_queue *q,
> u64 value);
> @@ -343,6 +372,7 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
> static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
> [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
> [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_EUDEBUG] = exec_queue_set_eudebug,
> };
>
> static int exec_queue_user_ext_set_property(struct xe_device *xe,
> @@ -362,7 +392,8 @@ static int exec_queue_user_ext_set_property(struct xe_device *xe,
> ARRAY_SIZE(exec_queue_set_property_funcs)) ||
> XE_IOCTL_DBG(xe, ext.pad) ||
> XE_IOCTL_DBG(xe, ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY &&
> - ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE))
> + ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE &&
> + ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_EUDEBUG))
> return -EINVAL;
>
> idx = array_index_nospec(ext.property, ARRAY_SIZE(exec_queue_set_property_funcs));
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> index 1408b02eea53..48e1190c2b58 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> @@ -90,6 +90,13 @@ struct xe_exec_queue {
> */
> unsigned long flags;
>
> + /**
> + * @eudebug_flags: immutable eudebug flags for this exec queue.
> + * Set up with DRM_XE_EXEC_QUEUE_SET_PROPERTY_EUDEBUG.
> + */
> +#define EXEC_QUEUE_EUDEBUG_FLAG_ENABLE BIT(0)
> + unsigned long eudebug_flags;
> +
> union {
> /** @multi_gt_list: list head for VM bind engines if multi-GT */
> struct list_head multi_gt_list;
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 0d8b871b47fe..74813bc20787 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -532,7 +532,7 @@ static int hw_engine_init(struct xe_gt *gt, struct xe_hw_engine *hwe,
> goto err_name;
> }
>
> - hwe->kernel_lrc = xe_lrc_create(hwe, NULL, SZ_16K);
> + hwe->kernel_lrc = xe_lrc_create(hwe, NULL, SZ_16K, 0);
> if (IS_ERR(hwe->kernel_lrc)) {
> err = PTR_ERR(hwe->kernel_lrc);
> goto err_hwsp;
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 94ff62e1d95e..563b57f5b9ee 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -890,7 +890,7 @@ static void xe_lrc_finish(struct xe_lrc *lrc)
> #define PVC_CTX_ACC_CTR_THOLD (0x2a + 1)
>
> static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
> - struct xe_vm *vm, u32 ring_size)
> + struct xe_vm *vm, u32 ring_size, u32 flags)
> {
> struct xe_gt *gt = hwe->gt;
> struct xe_tile *tile = gt_to_tile(gt);
> @@ -1007,6 +1007,16 @@ static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
> map = __xe_lrc_start_seqno_map(lrc);
> xe_map_write32(lrc_to_xe(lrc), &map, lrc->fence_ctx.next_seqno - 1);
>
> + if (flags & LRC_CREATE_RUNALONE) {
> + u32 ctx_control = xe_lrc_read_ctx_reg(lrc, CTX_CONTEXT_CONTROL);
> +
> + drm_dbg(&xe->drm, "read CTX_CONTEXT_CONTROL: 0x%x\n", ctx_control);
> + ctx_control |= _MASKED_BIT_ENABLE(CTX_CTRL_RUN_ALONE);
> + drm_dbg(&xe->drm, "written CTX_CONTEXT_CONTROL: 0x%x\n", ctx_control);
> +
> + xe_lrc_write_ctx_reg(lrc, CTX_CONTEXT_CONTROL, ctx_control);
> + }
> +
> return 0;
>
> err_lrc_finish:
> @@ -1026,7 +1036,7 @@ static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
> * upon failure.
> */
> struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
> - u32 ring_size)
> + u32 ring_size, u32 flags)
> {
> struct xe_lrc *lrc;
> int err;
> @@ -1035,7 +1045,7 @@ struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
> if (!lrc)
> return ERR_PTR(-ENOMEM);
>
> - err = xe_lrc_init(lrc, hwe, vm, ring_size);
> + err = xe_lrc_init(lrc, hwe, vm, ring_size, flags);
> if (err) {
> kfree(lrc);
> return ERR_PTR(err);
> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
> index c24542e89318..d2429a26fb22 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_lrc.h
> @@ -22,8 +22,10 @@ struct xe_vm;
>
> #define LRC_PPHWSP_SCRATCH_ADDR (0x34 * 4)
>
> +#define LRC_CREATE_RUNALONE BIT(0)
> +
> struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
> - u32 ring_size);
> + u32 ring_size, u32 flags);
> void xe_lrc_destroy(struct kref *ref);
>
> /**
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index a68734ff12f4..61c4c061bd75 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -1110,7 +1110,8 @@ struct drm_xe_exec_queue_create {
> #define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
> #define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
> #define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
> -
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_EUDEBUG 2
> +#define DRM_XE_EXEC_QUEUE_EUDEBUG_FLAG_ENABLE (1 << 0)
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> --
> 2.34.1
>
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