✓ CI.checkpatch: success for drm/xe/xe_gt_idle: add debugfs entry for powergating info (rev2)

[Patchwork]

== Series Details ==

Series: drm/xe/xe_gt_idle: add debugfs entry for powergating info (rev2)
URL   : https://patchwork.freedesktop.org/series/136477/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
5ce3e132caaa5b45e5e50201b574a097d130967c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 28a6539a5b2fe503e73587a4249bd958710f0179
Author: Riana Tauro <riana.tauro at intel.com>
Date:   Mon Jul 29 15:59:42 2024 +0530

    drm/xe/xe_gt_idle: add debugfs entry for powergating info
    
    Coarse Powergating is a power saving technique where Render and Media
    can be power-gated independently irrespective of the rest of the GT.
    
    For debug purposes, it is useful to expose the powergating information.
    
    v2: move to debugfs
        add details to commit message
        add per-slice status for media
        define reg bits in descending order (Matt Roper)
    
    v3: fix return statement
        fix kernel-doc
        use loop for media slices
        use helper function for status (Michal)
    
    Signed-off-by: Riana Tauro <riana.tauro at intel.com>
+ /mt/dim checkpatch 6f226dd91cbd83b14b375dac4246f617f0b98288 drm-intel
28a6539a5b2f drm/xe/xe_gt_idle: add debugfs entry for powergating info