[PATCH i-g-t] drm/xe/hwmon: Fix PL1 disable flow in xe_hwmon_power_max_write

Cavitt, Jonathan jonathan.cavitt at intel.com
Wed Jul 31 21:12:46 UTC 2024


-----Original Message-----
From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Karthik Poosa
Sent: Wednesday, July 31, 2024 9:57 AM
To: intel-xe at lists.freedesktop.org
Cc: Gupta, Anshuman <anshuman.gupta at intel.com>; Nilawar, Badal <badal.nilawar at intel.com>; Belgaumkar, Vinay <vinay.belgaumkar at intel.com>; Dixit, Ashutosh <ashutosh.dixit at intel.com>; Vivi, Rodrigo <rodrigo.vivi at intel.com>; Poosa, Karthik <karthik.poosa at intel.com>
Subject: [PATCH i-g-t] drm/xe/hwmon: Fix PL1 disable flow in xe_hwmon_power_max_write
> 
> In xe_hwmon_power_max_write, for PL1 disable supported case, instead of
> returning after PL1 disable, PL1 enable was path also being run.
> Fixed it by returing after disable.

s/returing/returning
also
s/was path/path was
but other than that:
Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
-Jonathan Cavitt

> 
> Signed-off-by: Karthik Poosa <karthik.poosa at intel.com>
> Fixes: fef6dd12b45a ("drm/xe/hwmon: Protect hwmon rw attributes with hwmon_lock")
> ---
>  drivers/gpu/drm/xe/xe_hwmon.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 0c8ce09e5025..832ea81faeee 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -203,9 +203,10 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, int channel, long va
>  		reg_val = xe_mmio_rmw32(hwmon->gt, rapl_limit, PKG_PWR_LIM_1_EN, 0);
>  		reg_val = xe_mmio_read32(hwmon->gt, rapl_limit);
>  		if (reg_val & PKG_PWR_LIM_1_EN) {
> +			drm_warn(&gt_to_xe(hwmon->gt)->drm, "PL1 disable is not supported!\n");
>  			ret = -EOPNOTSUPP;
> -			goto unlock;
>  		}
> +		goto unlock;
>  	}
>  
>  	/* Computation in 64-bits to avoid overflow. Round to nearest. */
> -- 
> 2.25.1
> 
> 


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