✓ CI.checkpatch: success for drm/xe: use non-posted writes for user fence signalling

[Patchwork]

== Series Details ==

Series: drm/xe: use non-posted writes for user fence signalling
URL   : https://patchwork.freedesktop.org/series/134354/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d3f58a2d04ceb799b4f9cd70f6cb8cac076c4ca5
Author: Andrzej Hajda <andrzej.hajda at intel.com>
Date:   Mon Jun 3 10:06:20 2024 +0200

    drm/xe: use non-posted writes for user fence signalling
    
    Moving flush before user fence signalling fixes issue with prior writes not
    visible when fence is signalled. The change, however, should be also
    accompanied with updating signalling to non-posted write, there is no
    need for flush, as writes are coherent with CPU cache.
    
    Fixes: 38007fa96419 ("drm/xe: flush gtt before signalling user fence on all engines")
    Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
+ /mt/dim checkpatch dbdf6d2379c9a06795be8de282afeaa3b2a06315 drm-intel
d3f58a2d04ce drm/xe: use non-posted writes for user fence signalling